[RFC PATCH v6 00/36] KVM: x86: eVMCS rework

Sean Christopherson
2022-08-24T03:03:37Z

This is what I ended up with as a way to dig ourselves out of the eVMCS
conundrum. Not well tested, though KUT and selftests pass. The enforcement
added by "KVM: nVMX: Enforce unsupported eVMCS in VMX MSRs for host accesses"
is not tested at all (and lacks a changelog).

I don't care if we add a new capability or extend the existing one, my goal
was purely to frame in the KVM internals and show _a_ way to let userspace
opt-in. I do think we need something that isn't CPUID-based though.

Everything from patch 22 onwards should be unchanged from your v5.

Jim Mattson (1):
KVM: x86: VMX: Replace some Intel model numbers with mnemonics

Sean Christopherson (10):
KVM: x86: Check for existing Hyper-V vCPU in kvm_hv_vcpu_init()
KVM: x86: Report error when setting CPUID if Hyper-V allocation fails
KVM: nVMX: Treat eVMCS as enabled for guest iff Hyper-V is also
enabled
KVM: nVMX: Use CC() macro to handle eVMCS unsupported controls checks
KVM: nVMX: Enforce unsupported eVMCS in VMX MSRs for host accesses
KVM: nVMX: WARN once and fail VM-Enter if eVMCS sees VMFUNC[63:32] !=
0
KVM: nVMX: Don't propagate vmcs12's PERF_GLOBAL_CTRL settings to
vmcs02
KVM: nVMX: Always emulate PERF_GLOBAL_CTRL VM-Entry/VM-Exit controls
KVM: VMX: Don't toggle VM_ENTRY_IA32E_MODE for 32-bit kernels/KVM
KVM: VMX: Adjust CR3/INVPLG interception for EPT=y at runtime, not
setup

Vitaly Kuznetsov (25):
x86/hyperv: Fix 'struct hv_enlightened_vmcs' definition
x86/hyperv: Update 'struct hv_enlightened_vmcs' definition
KVM: x86: Zero out entire Hyper-V CPUID cache before processing
entries
KVM: nVMX: Refactor unsupported eVMCS controls logic to use 2-d array
KVM: VMX: Define VMCS-to-EVMCS conversion for the new fields
KVM: nVMX: Support several new fields in eVMCSv1
KVM: x86: hyper-v: Cache HYPERV_CPUID_NESTED_FEATURES CPUID leaf
KVM: selftests: Add ENCLS_EXITING_BITMAP{,HIGH} VMCS fields
KVM: selftests: Switch to updated eVMCSv1 definition
KVM: nVMX: Support PERF_GLOBAL_CTRL with enlightened VMCS
KVM: nVMX: Support TSC scaling with enlightened VMCS
KVM: selftests: Enable TSC scaling in evmcs selftest
KVM: VMX: Get rid of eVMCS specific VMX controls sanitization
KVM: VMX: Check VM_ENTRY_IA32E_MODE in setup_vmcs_config()
KVM: VMX: Check CPU_BASED_{INTR,NMI}_WINDOW_EXITING in
setup_vmcs_config()
KVM: VMX: Tweak the special handling of SECONDARY_EXEC_ENCLS_EXITING
in setup_vmcs_config()
KVM: VMX: Extend VMX controls macro shenanigans
KVM: VMX: Move CPU_BASED_CR8_{LOAD,STORE}_EXITING filtering out of
setup_vmcs_config()
KVM: VMX: Add missing VMEXIT controls to vmcs_config
KVM: VMX: Add missing CPU based VM execution controls to vmcs_config
KVM: VMX: Move LOAD_IA32_PERF_GLOBAL_CTRL errata handling out of
setup_vmcs_config()
KVM: nVMX: Always set required-1 bits of pinbased_ctls to
PIN_BASED_ALWAYSON_WITHOUT_TRUE_MSR
KVM: nVMX: Use sanitized allowed-1 bits for VMX control MSRs
KVM: VMX: Cache MSR_IA32_VMX_MISC in vmcs_config
KVM: nVMX: Use cached host MSR_IA32_VMX_MISC value for setting up
nested MSR

arch/x86/include/asm/hyperv-tlfs.h | 22 +-
arch/x86/include/asm/kvm_host.h | 6 +-
arch/x86/kvm/cpuid.c | 18 +-
arch/x86/kvm/hyperv.c | 70 +++--
arch/x86/kvm/hyperv.h | 6 +-
arch/x86/kvm/vmx/capabilities.h | 14 +-
arch/x86/kvm/vmx/evmcs.c | 249 +++++++++++-----
arch/x86/kvm/vmx/evmcs.h | 30 +-
arch/x86/kvm/vmx/nested.c | 109 ++++---
arch/x86/kvm/vmx/nested.h | 2 +-
arch/x86/kvm/vmx/vmx.c | 265 ++++++++----------
arch/x86/kvm/vmx/vmx.h | 174 ++++++++++--
arch/x86/kvm/x86.c | 8 +-
include/uapi/linux/kvm.h | 1 +
.../selftests/kvm/include/x86_64/evmcs.h | 45 ++-
.../selftests/kvm/include/x86_64/vmx.h | 2 +
.../testing/selftests/kvm/x86_64/evmcs_test.c | 31 +-
17 files changed, 695 insertions(+), 357 deletions(-)

base-commit: 372d07084593dc7a399bf9bee815711b1fb1bcf2
--
2.37.1.595.g718a3a8f04-goog