From: Andrew Jones <ajones@ventanamicro.com>
To: "Heiko Stübner" <heiko@sntech.de>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Anup Patel <anup@brainfault.org>,
Atish Patra <atishp@atishpatra.org>,
Jisheng Zhang <jszhang@kernel.org>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
kvm@vger.kernel.org, kvm-riscv@lists.infradead.org
Subject: Re: [PATCH v3 05/13] riscv: cpufeature: extend riscv_cpufeature_patch_func to all ISA extensions
Date: Thu, 12 Jan 2023 10:21:36 +0100 [thread overview]
Message-ID: <20230112092136.f2g43hrhmrqouy4y@orel> (raw)
In-Reply-To: <2398293.3Lj2Plt8kZ@diego>
On Thu, Jan 12, 2023 at 12:29:57AM +0100, Heiko Stübner wrote:
> Hi Jisheng.
>
> Am Mittwoch, 11. Januar 2023, 18:10:19 CET schrieb Jisheng Zhang:
> > riscv_cpufeature_patch_func() currently only scans a limited set of
> > cpufeatures, explicitly defined with macros. Extend it to probe for all
> > ISA extensions.
> >
> > Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> > Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> > Reviewed-by: Heiko Stuebner <heiko@sntech.de>
> > ---
> > arch/riscv/include/asm/errata_list.h | 9 ++--
> > arch/riscv/kernel/cpufeature.c | 63 ++++------------------------
> > 2 files changed, 11 insertions(+), 61 deletions(-)
>
> hmmm ... I do see a somewhat big caveat for this.
> and would like to take back my Reviewed-by for now
>
>
> With this change we would limit the patchable cpufeatures to actual
> riscv extensions. But cpufeatures can also be soft features like
> how performant the core handles unaligned accesses.
I agree that this needs to be addressed and Jisheng also raised this
yesterday here [*]. It seems we need the concept of cpufeatures, which
may be extensions or non-extensions.
[*] https://lore.kernel.org/all/Y77xyNPNqnFQUqAx@xhacker/
>
> See Palmer's series [0].
>
>
> Also this essentially codifies that each ALTERNATIVE can only ever
> be attached to exactly one extension.
>
> But contrary to vendor-errata, it is very likely that we will need
> combinations of different extensions for some alternatives in the future.
One possible approach may be to combine extensions/non-extensions at boot
time into pseudo-cpufeatures. Then, alternatives can continue attaching to
a single "feature". (I'm not saying that's a better approach than the
bitmap, I'm just suggesting it as something else to consider.)
Thanks,
drew
>
> In my optimization quest, I found that it's actually pretty neat to
> convert the errata-id for cpufeatures to a bitfield [1], because then it's
> possible to just combine extensions into said bitfield [2]:
>
> ALTERNATIVE_2("nop",
> "j strcmp_zbb_unaligned", 0, CPUFEATURE_ZBB | CPUFEATURE_FAST_UNALIGNED, 0, CONFIG_RISCV_ISA_ZBB,
> "j variant_zbb", 0, CPUFEATURE_ZBB, CPUFEATURE_FAST_UNALIGNED, CONFIG_RISCV_ISA_ZBB)
>
> [the additional field there models a "not" component]
>
> So I really feel this would limit us quite a bit.
>
>
> Heiko
>
>
>
> [0] https://git.kernel.org/pub/scm/linux/kernel/git/palmer/linux.git/commit/?h=riscv-hwprobe-v1&id=510c491cb9d87dcbdc91c63558dc704968723240
> [1] https://github.com/mmind/linux-riscv/commit/f57a896122ee7e666692079320fc35829434cf96
> [2] https://github.com/mmind/linux-riscv/commit/8cef615dab0c00ad68af2651ee5b93d06be17f27#diff-194cb8a86f9fb9b03683295f21c8f46b456a9f94737f01726ddbcbb9e3aace2cR12
>
>
next prev parent reply other threads:[~2023-01-12 9:29 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-11 17:10 [PATCH v3 00/13] riscv: improve boot time isa extensions handling Jisheng Zhang
2023-01-11 17:10 ` [PATCH v3 01/13] riscv: fix jal offsets in patched alternatives Jisheng Zhang
2023-01-11 17:56 ` Andrew Jones
2023-01-11 23:31 ` Heiko Stübner
2023-01-12 20:25 ` Conor Dooley
2023-01-11 17:10 ` [PATCH v3 02/13] riscv: move riscv_noncoherent_supported() out of ZICBOM probe Jisheng Zhang
2023-01-11 17:10 ` [PATCH v3 03/13] riscv: cpufeature: detect RISCV_ALTERNATIVES_EARLY_BOOT earlier Jisheng Zhang
2023-01-12 21:11 ` Conor Dooley
2023-01-11 17:10 ` [PATCH v3 04/13] riscv: hwcap: make ISA extension ids can be used in asm Jisheng Zhang
2023-01-12 21:28 ` Conor Dooley
2023-01-15 13:13 ` Jisheng Zhang
2023-01-11 17:10 ` [PATCH v3 05/13] riscv: cpufeature: extend riscv_cpufeature_patch_func to all ISA extensions Jisheng Zhang
2023-01-11 23:29 ` Heiko Stübner
2023-01-12 9:21 ` Andrew Jones [this message]
2023-01-13 15:18 ` Conor Dooley
2023-01-14 20:32 ` Conor Dooley
2023-01-18 21:54 ` Conor Dooley
2023-01-19 8:29 ` Andrew Jones
2023-01-19 22:13 ` Conor Dooley
2023-01-15 13:59 ` Jisheng Zhang
2023-01-15 14:19 ` Jisheng Zhang
2023-01-11 17:10 ` [PATCH v3 06/13] riscv: introduce riscv_has_extension_[un]likely() Jisheng Zhang
2023-01-11 17:10 ` [PATCH v3 07/13] riscv: fpu: switch has_fpu() to riscv_has_extension_likely() Jisheng Zhang
2023-01-12 21:58 ` Conor Dooley
2023-01-11 17:10 ` [PATCH v3 08/13] riscv: module: move find_section to module.h Jisheng Zhang
2023-01-11 17:10 ` [PATCH v3 09/13] riscv: switch to relative alternative entries Jisheng Zhang
2023-01-11 18:11 ` Andrew Jones
2023-01-12 21:49 ` Conor Dooley
2023-01-11 17:10 ` [PATCH v3 10/13] riscv: alternative: patch alternatives in the vDSO Jisheng Zhang
2023-01-12 7:48 ` Conor Dooley
2023-01-12 21:55 ` Conor Dooley
2023-01-11 17:10 ` [PATCH v3 11/13] riscv: cpu_relax: switch to riscv_has_extension_likely() Jisheng Zhang
2023-01-12 21:59 ` Conor Dooley
2023-01-11 17:10 ` [PATCH v3 12/13] riscv: KVM: Switch has_svinval() to riscv_has_extension_unlikely() Jisheng Zhang
2023-01-11 17:10 ` [PATCH v3 13/13] riscv: remove riscv_isa_ext_keys[] array and related usage Jisheng Zhang
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