From: Takahiro Itazuri <itazur@amazon.com>
To: <kvm@vger.kernel.org>, <x86@kernel.org>
Cc: Sean Christopherson <seanjc@google.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
<linux-kernel@vger.kernel.org>,
"Takahiro Itazuri" <zulinx86@gmail.com>,
Takahiro Itazuri <itazur@amazon.com>
Subject: [PATCH 1/2] x86/cpufeatures: Add AMD-specific IBRS bits
Date: Mon, 27 Feb 2023 21:05:25 +0000 [thread overview]
Message-ID: <20230227210526.83182-2-itazur@amazon.com> (raw)
In-Reply-To: <20230227210526.83182-1-itazur@amazon.com>
AMD processors have some AMD-specific IBRS related bits in CPUID
Fn8000_0008_EBX (ref: AMD64 Architecture Programmer's Manual, Volume 3:
General-Purpose and System Instructions).
Signed-off-by: Takahiro Itazuri <itazur@amazon.com>
---
arch/x86/include/asm/cpufeatures.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 8f39c46197b8..cd7245507745 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -324,7 +324,10 @@
#define X86_FEATURE_AMD_IBPB (13*32+12) /* "" Indirect Branch Prediction Barrier */
#define X86_FEATURE_AMD_IBRS (13*32+14) /* "" Indirect Branch Restricted Speculation */
#define X86_FEATURE_AMD_STIBP (13*32+15) /* "" Single Thread Indirect Branch Predictors */
+#define X86_FEATURE_AMD_IBRS_ALWAYS_ON (13*32+16) /* "" Indirect Branch Restricted Speculation always-on preferred */
#define X86_FEATURE_AMD_STIBP_ALWAYS_ON (13*32+17) /* "" Single Thread Indirect Branch Predictors always-on preferred */
+#define X86_FEATURE_AMD_IBRS_PREFERRED (13*32+18) /* "" Indirect Branch Restricted Speculation preferred over software */
+#define X86_FEATURE_AMD_IBRS_SAME_MODE (13*32+19) /* "" Indirect Branch Restricted Speculation provides same mode protection */
#define X86_FEATURE_AMD_PPIN (13*32+23) /* Protected Processor Inventory Number */
#define X86_FEATURE_AMD_SSBD (13*32+24) /* "" Speculative Store Bypass Disable */
#define X86_FEATURE_VIRT_SSBD (13*32+25) /* Virtualized Speculative Store Bypass Disable */
--
2.38.0
next prev parent reply other threads:[~2023-02-27 21:15 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-27 21:05 [PATCH 0/2] KVM: x86: Propagate AMD-specific IBRS bits to guests Takahiro Itazuri
2023-02-27 21:05 ` Takahiro Itazuri [this message]
2023-02-27 21:05 ` [PATCH 2/2] KVM: x86: Propagate AMD-specific IBRS related bits Takahiro Itazuri
2023-02-27 21:40 ` [PATCH 0/2] KVM: x86: Propagate AMD-specific IBRS bits to guests Borislav Petkov
2023-02-28 18:13 ` Takahiro Itazuri
2023-02-28 19:24 ` Borislav Petkov
2023-02-28 19:41 ` Takahiro Itazuri
2023-02-28 20:45 ` Borislav Petkov
2023-02-28 22:24 ` Takahiro Itazuri
2023-02-28 22:50 ` Borislav Petkov
2023-03-06 21:16 ` Sean Christopherson
2023-03-06 21:25 ` Paolo Bonzini
2023-03-06 21:44 ` Borislav Petkov
2023-03-06 21:47 ` Paolo Bonzini
2023-03-06 21:54 ` Borislav Petkov
2023-03-07 18:49 ` Sean Christopherson
2023-03-07 18:58 ` Borislav Petkov
2023-03-07 19:28 ` Sean Christopherson
2023-03-07 19:55 ` Borislav Petkov
2023-03-06 21:31 ` Paolo Bonzini
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