[PATCH 2/2] KVM: vmx/pmu: Add support for selected fixed vPMU enablement for PMU v5

Anselm Busse
2023-04-27T09:56:36Z

This commits adds virtualization support to enable slected fixed
function PMCs for Intel PMU v5 based on CPUID.0AH.ECX.

Starting with v5, the Intel PMU allows to indicate the available fixed
function PMCs not only through CPUID.0AH.EDX[4:0] but also through a
bit mask in CPUID.0AH.ECX. According to the SDM the OS can consider a
fix function PMC i supported for:

CPUID.0AH.ECX[i] || (CPUID.0AH.EDX[4:0] > i)

This behavior is already supported by the Intel PMU driver. However, KVM
support is missing. Therefore, this commit extends the KVM
implementation by also taking the values in CPUID.0AH.ECX into account
when setting the bitmap of enabled fixed function PMCs.

Signed-off-by: Anselm Busse <abusse@amazon.com>
---
arch/x86/kvm/vmx/pmu_intel.c | 7 +++++++
1 file changed, 7 insertions(+)

diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
index 55ff06a9df47..d1fd3472bfd4 100644
--- a/arch/x86/kvm/vmx/pmu_intel.c
+++ b/arch/x86/kvm/vmx/pmu_intel.c
@@ -562,6 +562,13 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
kvm_pmu_cap.bit_width_fixed);
pmu->counter_bitmask[KVM_PMC_FIXED] =
((u64)1 << edx.split.bit_width_fixed) - 1;
+
+ if (pmu->version >= 5)
+ bitmap_or(pmu->mask_arch_fixed_counters,
+ pmu->mask_arch_fixed_counters,
+ (unsigned long *)&entry->ecx,
+ INTEL_PMC_MAX_FIXED);
+
setup_fixed_pmc_eventsel(pmu);
}