From: Anup Patel <apatel@ventanamicro.com>
To: Will Deacon <will@kernel.org>,
julien.thierry.kdev@gmail.com, maz@kernel.org
Cc: Paolo Bonzini <pbonzini@redhat.com>,
Atish Patra <atishp@atishpatra.org>,
Andrew Jones <ajones@ventanamicro.com>,
Anup Patel <anup@brainfault.org>,
kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
Anup Patel <apatel@ventanamicro.com>
Subject: [PATCH v2 6/8] riscv: Add Zicboz extension support
Date: Mon, 5 Jun 2023 19:32:06 +0530 [thread overview]
Message-ID: <20230605140208.272027-7-apatel@ventanamicro.com> (raw)
In-Reply-To: <20230605140208.272027-1-apatel@ventanamicro.com>
From: Andrew Jones <ajones@ventanamicro.com>
When the Zicboz extension is available expose it to the guest.
Also provide the guest the size of the cache block through DT.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
riscv/fdt.c | 12 +++++++++++-
riscv/include/kvm/kvm-config-arch.h | 3 +++
2 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/riscv/fdt.c b/riscv/fdt.c
index 17d6757..a76dc37 100644
--- a/riscv/fdt.c
+++ b/riscv/fdt.c
@@ -21,6 +21,7 @@ struct isa_ext_info isa_info_arr[] = {
{"svpbmt", KVM_RISCV_ISA_EXT_SVPBMT},
{"zbb", KVM_RISCV_ISA_EXT_ZBB},
{"zicbom", KVM_RISCV_ISA_EXT_ZICBOM},
+ {"zicboz", KVM_RISCV_ISA_EXT_ZICBOZ},
{"zihintpause", KVM_RISCV_ISA_EXT_ZIHINTPAUSE},
};
@@ -47,7 +48,7 @@ static void generate_cpu_nodes(void *fdt, struct kvm *kvm)
int cpu, pos, i, index, valid_isa_len;
const char *valid_isa_order = "IEMAFDQCLBJTPVNSUHKORWXYZG";
int arr_sz = ARRAY_SIZE(isa_info_arr);
- unsigned long cbom_blksz = 0;
+ unsigned long cbom_blksz = 0, cboz_blksz = 0;
_FDT(fdt_begin_node(fdt, "cpus"));
_FDT(fdt_property_cell(fdt, "#address-cells", 0x1));
@@ -97,6 +98,13 @@ static void generate_cpu_nodes(void *fdt, struct kvm *kvm)
die("KVM_GET_ONE_REG failed (config.zicbom_block_size)");
}
+ if (isa_info_arr[i].ext_id == KVM_RISCV_ISA_EXT_ZICBOZ && !cboz_blksz) {
+ reg.id = RISCV_CONFIG_REG(zicboz_block_size);
+ reg.addr = (unsigned long)&cboz_blksz;
+ if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
+ die("KVM_GET_ONE_REG failed (config.zicboz_block_size)");
+ }
+
if ((strlen(isa_info_arr[i].name) + pos + 1) >= CPU_ISA_MAX_LEN) {
pr_warning("Insufficient space to append ISA exension\n");
break;
@@ -118,6 +126,8 @@ static void generate_cpu_nodes(void *fdt, struct kvm *kvm)
_FDT(fdt_property_string(fdt, "riscv,isa", cpu_isa));
if (cbom_blksz)
_FDT(fdt_property_cell(fdt, "riscv,cbom-block-size", cbom_blksz));
+ if (cboz_blksz)
+ _FDT(fdt_property_cell(fdt, "riscv,cboz-block-size", cboz_blksz));
_FDT(fdt_property_cell(fdt, "reg", cpu));
_FDT(fdt_property_string(fdt, "status", "okay"));
diff --git a/riscv/include/kvm/kvm-config-arch.h b/riscv/include/kvm/kvm-config-arch.h
index 8448b1a..b12605d 100644
--- a/riscv/include/kvm/kvm-config-arch.h
+++ b/riscv/include/kvm/kvm-config-arch.h
@@ -40,6 +40,9 @@ struct kvm_config_arch {
OPT_BOOLEAN('\0', "disable-zicbom", \
&(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_ZICBOM], \
"Disable Zicbom Extension"), \
+ OPT_BOOLEAN('\0', "disable-zicboz", \
+ &(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_ZICBOZ], \
+ "Disable Zicboz Extension"), \
OPT_BOOLEAN('\0', "disable-zihintpause", \
&(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_ZIHINTPAUSE],\
"Disable Zihintpause Extension"), \
--
2.34.1
next prev parent reply other threads:[~2023-06-05 14:02 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-05 14:02 [PATCH v2 0/8] RISC-V SBI enable/disable, Zbb, Zicboz, and Ssaia support Anup Patel
2023-06-05 14:02 ` [PATCH v2 1/8] Sync-up headers with Linux-6.4-rc5 Anup Patel
2023-07-06 14:33 ` Will Deacon
2023-07-06 17:17 ` Anup Patel
2023-06-05 14:02 ` [PATCH v2 2/8] riscv: Allow setting custom mvendorid, marchid, and mimpid Anup Patel
2023-06-05 14:02 ` [PATCH v2 3/8] riscv: Allow disabling SBI extensions for Guest Anup Patel
2023-06-05 14:02 ` [PATCH v2 4/8] riscv: Sort the ISA extension array alphabetically Anup Patel
2023-06-05 14:02 ` [PATCH v2 5/8] riscv: Add zbb extension support Anup Patel
2023-06-05 14:02 ` Anup Patel [this message]
2023-06-05 14:02 ` [PATCH v2 7/8] riscv: Add Ssaia " Anup Patel
2023-06-05 14:02 ` [PATCH v2 8/8] riscv: Fix guest RAM alloc size computation for RV32 Anup Patel
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