From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66E66EB64D9 for ; Wed, 14 Jun 2023 11:09:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235496AbjFNLJG (ORCPT ); Wed, 14 Jun 2023 07:09:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34052 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233170AbjFNLIv (ORCPT ); Wed, 14 Jun 2023 07:08:51 -0400 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C66FDDF; Wed, 14 Jun 2023 04:08:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1686740930; x=1718276930; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=Mm79erLzfDU1g9VPH5nKFTr67LEN6rYuyJAuFo/ZDXU=; b=eOstIn05Qcbx8d6mDDVtRvz11YWnxoCAuh3K8/HrzpT2f2XnnA0iRS3r ImepqkZzd2KuX2nQ5OHb5ck8vO64bEkoUCO0WUBMnrGYIg+T+MOiwwGgw JlRb7qhDuPJWCefzqOmGS/VxmtsI5E4fqhbfD3cjlpVXrOi0I3aQQyEi6 NfFsvYwvY1ZS10Sl2e8Sook+oD7MMObDQdHA4h+E9uZ7oh9LFakD1Q5+5 2PB3bA7GHx8qolYq0f/nByqxw+B3wp/TpU9DCVi5UjkzpeR6URjB89GIs l4NOTBYwwWzeglKrjLZV8Rkt65hZVg6fTUXoSmlH85rPye0tdc6gc3wkt Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10740"; a="386993008" X-IronPort-AV: E=Sophos;i="6.00,242,1681196400"; d="scan'208";a="386993008" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Jun 2023 04:08:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10740"; a="741798491" X-IronPort-AV: E=Sophos;i="6.00,242,1681196400"; d="scan'208";a="741798491" Received: from wlwpo-8.amr.corp.intel.com (HELO box.shutemov.name) ([10.251.211.89]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Jun 2023 04:08:38 -0700 Received: by box.shutemov.name (Postfix, from userid 1000) id 7AC2910A069; Wed, 14 Jun 2023 14:08:21 +0300 (+03) Date: Wed, 14 Jun 2023 14:08:21 +0300 From: "kirill.shutemov@linux.intel.com" To: "Huang, Kai" Cc: "kvm@vger.kernel.org" , "Hansen, Dave" , "david@redhat.com" , "bagasdotme@gmail.com" , "ak@linux.intel.com" , "Wysocki, Rafael J" , "Luck, Tony" , "Chatre, Reinette" , "Christopherson,, Sean" , "pbonzini@redhat.com" , "tglx@linutronix.de" , "Yamahata, Isaku" , "linux-kernel@vger.kernel.org" , "linux-mm@kvack.org" , "Shahar, Sagi" , "peterz@infradead.org" , "imammedo@redhat.com" , "Gao, Chao" , "Brown, Len" , "sathyanarayanan.kuppuswamy@linux.intel.com" , "Huang, Ying" , "Williams, Dan J" Subject: Re: [PATCH v11 18/20] x86: Handle TDX erratum to reset TDX private memory during kexec() and reboot Message-ID: <20230614110821.pf35kxd4vcwjjpb5@box> References: <5aa7506d4fedbf625e3fe8ceeb88af3be1ce97ea.1685887183.git.kai.huang@intel.com> <20230614100245.3vehux365zou3ze6@box> <84dcc5ff896f487c95dc1602b627abef8d48432f.camel@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <84dcc5ff896f487c95dc1602b627abef8d48432f.camel@intel.com> Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Wed, Jun 14, 2023 at 10:58:13AM +0000, Huang, Kai wrote: > > And the platform has to > > handle erratum in BIOS to reset memory status on reboot anyway. > > So "handle erratum in BIOS" I think you mean "warm reset" doesn't reset TDX > private pages, and the BIOS needs to disable "warm reset". > > IIUC this means the kernel needs to depend on specific BIOS setting to work > normally, and IIUC the kernel even cannot be aware of this setting? > > Should the kernel just reset all TDX private pages when erratum is present > during reboot so the kernel doesn't depend on BIOS? Kernel cannot really function if we don't trust BIOS to do its job. Kernel depends on BIOS services anyway. We cannot try to handle everything in kernel just in case BIOS drops the ball. -- Kiryl Shutsemau / Kirill A. Shutemov