From: Peter Zijlstra <peterz@infradead.org>
To: Xin Li <xin3.li@intel.com>
Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
x86@kernel.org, tglx@linutronix.de, mingo@redhat.com,
bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com,
seanjc@google.com, pbonzini@redhat.com
Subject: Re: [PATCH] x86/trapnr: Add event type macros to <asm/trapnr.h>
Date: Thu, 6 Jul 2023 08:45:19 +0200 [thread overview]
Message-ID: <20230706064519.GC2833176@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <20230706051443.2054-1-xin3.li@intel.com>
On Wed, Jul 05, 2023 at 10:14:43PM -0700, Xin Li wrote:
> +/*
> + * Event type codes used by both Intel VT-x and FRED
> + */
> +/* Maskable external interrupt */
> +#define EVENT_TYPE_HWINT 0
> +#define EVENT_TYPE_RESERVED 1
> +#define EVENT_TYPE_NMI 2
> +/* Hardware exceptions (e.g., page fault) */
> +#define EVENT_TYPE_HWFAULT 3
> +/* Software interrupt (INT n) */
> +#define EVENT_TYPE_SWINT 4
> +/* INT1 (ICEBP) */
> +#define EVENT_TYPE_PRIVSW 5
> +/* Software exception (INT3 or INTO) */
> +#define EVENT_TYPE_SWFAULT 6
> +/* VT-x MTF or FRED SYSCALL/SYSENTER */
> +#define EVENT_TYPE_OTHER 7
So I know tglx hates on tail comments, but I find the below *MUCH* more
readable than the above horror show.
> -#define INTR_TYPE_EXT_INTR (0 << 8) /* external interrupt */
> -#define INTR_TYPE_RESERVED (1 << 8) /* reserved */
> -#define INTR_TYPE_NMI_INTR (2 << 8) /* NMI */
> -#define INTR_TYPE_HARD_EXCEPTION (3 << 8) /* processor exception */
> -#define INTR_TYPE_SOFT_INTR (4 << 8) /* software interrupt */
> -#define INTR_TYPE_PRIV_SW_EXCEPTION (5 << 8) /* ICE breakpoint - undocumented */
> -#define INTR_TYPE_SOFT_EXCEPTION (6 << 8) /* software exception */
> -#define INTR_TYPE_OTHER_EVENT (7 << 8) /* other event */
next prev parent reply other threads:[~2023-07-06 6:45 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-06 5:14 [PATCH] x86/trapnr: Add event type macros to <asm/trapnr.h> Xin Li
2023-07-06 6:45 ` Peter Zijlstra [this message]
2023-07-06 7:25 ` Li, Xin3
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