From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 47A3EC0015E for ; Fri, 28 Jul 2023 09:57:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234783AbjG1J5K (ORCPT ); Fri, 28 Jul 2023 05:57:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34186 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233687AbjG1J5H (ORCPT ); Fri, 28 Jul 2023 05:57:07 -0400 Received: from mail-ej1-x632.google.com (mail-ej1-x632.google.com [IPv6:2a00:1450:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 306732D5F for ; Fri, 28 Jul 2023 02:57:03 -0700 (PDT) Received: by mail-ej1-x632.google.com with SMTP id a640c23a62f3a-99bcc0adab4so278581766b.2 for ; Fri, 28 Jul 2023 02:57:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1690538221; x=1691143021; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date:from:to :cc:subject:date:message-id:reply-to; bh=EaDqHuP1/L0EWrVmqB4LDOlJLLXlDAKqsrZaIwzPq3M=; b=CiZw0lQlVNebikYEyzCGQwxP6oTaockZvcNTF5lhpUssizJZ0bAA3EEuC6Tb9lcj3Y ULPlZJ2+qXx0oToN3wpzQyWpwzOaXu2TpcN7isx4h6mFOoTB5MWaCWIjQRo9TTzLFkCe GudPlPLWQwqmIzUprt5rUDEJYS8qdmq0BoTlcA4Dhf0HVqU80A9aZGkGQ6+bW6kNUewp hrqto0T0KRzWRPIu7GbyTh2rABfCdM6761meIXZP3jvaIk/Tw0UeMdME6VbrNMj6m5hL 3mX/unrEmdBuN/L9rF8W7HsnwEDjbSY3BcVYkpC2IVfmpKYqW9i8cWMLMhNfe+xK6mMY +Lwg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690538221; x=1691143021; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=EaDqHuP1/L0EWrVmqB4LDOlJLLXlDAKqsrZaIwzPq3M=; b=LufIWUGa1cdMwBH1j6DaumRybmGqtGMRKP6JZAYrBd8f53Mj7EfTy/FjvltZElFv/3 pqcS/++sdZ7ffabUfhL/9DSogVLFS7jZlA6Wl5rUKX3pz7ohO2gCRTKkboGzBVYMwKKX F2j7Hg/fY7gwa2+e6n0qgZW8Qi/YZg1crSSEvFeQIKurps1SI3nWDCmzeBQfKAlK+Uo4 G/vza7pXfUmkITkhJwxxqDZfuNa/SWK2mdwxLklo9riyQ8/8raZVFmwL5D6Fe3jYMRIr cQKZtacZUMnkL46J24Dx3Pg7aCA5VxV6Sk/cLzzdHWtAkGKvojcgf9WNjiIJ7UYGrtsP ZAvA== X-Gm-Message-State: ABy/qLaokTqE6eS0seiPQfORwuCCvBObz2t8Rm6NuUCTxNoqT3v82Hyg L5mNGi5TUUnI7y5Z0kl77FClxw== X-Google-Smtp-Source: APBJJlHqWfBWRzK8qa3KtWSlfnaMwOND59ErRJQPppTu7WEQ5KiBxDjr8woTjRI48lVKdKnl5PO0Vw== X-Received: by 2002:a17:906:9bf1:b0:99b:c952:309b with SMTP id de49-20020a1709069bf100b0099bc952309bmr1700096ejc.55.1690538221588; Fri, 28 Jul 2023 02:57:01 -0700 (PDT) Received: from localhost (2001-1ae9-1c2-4c00-20f-c6b4-1e57-7965.ip6.tmcz.cz. [2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id qk29-20020a170906d9dd00b0099b42c90830sm1866923ejb.36.2023.07.28.02.57.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Jul 2023 02:57:01 -0700 (PDT) Date: Fri, 28 Jul 2023 11:57:00 +0200 From: Andrew Jones To: Haibo Xu Cc: Sean Christopherson , Haibo Xu , Paul Walmsley , Palmer Dabbelt , Albert Ou , Paolo Bonzini , Shuah Khan , Anup Patel , Atish Patra , Vipin Sharma , Colton Lewis , Marc Zyngier , Andrew Jones , Vishal Annapurve , linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, kvm-riscv@lists.infradead.org Subject: Re: [PATCH 0/4] RISCV: Add kvm Sstc timer selftest Message-ID: <20230728-5b0f530eba70ad08e8f4a67d@orel> References: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Fri, Jul 28, 2023 at 09:37:36AM +0800, Haibo Xu wrote: > On Thu, Jul 27, 2023 at 11:14 PM Sean Christopherson wrote: > > > > On Thu, Jul 27, 2023, Haibo Xu wrote: > > > The sstc_timer selftest is used to validate Sstc timer functionality > > > in a guest, which sets up periodic timer interrupts and check the > > > basic interrupt status upon its receipt. > > > > > > This KVM selftest was ported from aarch64 arch_timer and tested > > > with Linux v6.5-rc3 on a Qemu riscv64 virt machine. > > > > Would it be possible to extract the ARM bits from arch_timer and make the bulk of > > the test common to ARM and RISC-V? At a glance, there is quite a bit of copy+paste. > > Sure, I will have a try to consolidate the common code for ARM and RISC-V in v2. > Yes, afaict, we should be able to make aarch64/arch_timer.c another "split test", like we did for aarch64/get-reg-list.c, but before we do that, I'd like to get an ack from the Arm maintainers on the get-reg-list split to be sure that approach is acceptable. Thanks, drew