From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 55CF4C04E69 for ; Tue, 15 Aug 2023 18:40:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239248AbjHOSjs (ORCPT ); Tue, 15 Aug 2023 14:39:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44830 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239251AbjHOSjW (ORCPT ); Tue, 15 Aug 2023 14:39:22 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F27061BF0 for ; Tue, 15 Aug 2023 11:39:18 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 7E86A65F0C for ; Tue, 15 Aug 2023 18:39:18 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id CCC3DC4339A; Tue, 15 Aug 2023 18:39:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692124757; bh=TQOMNbAcAg/n5SBwl2e6jHoHTMikMmvsMZpCnMBRbts=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NQgzqOTvOTX5CSkXmAUbl6EtbYgzMvVX/ymqaX21scQIqhUzxhCfnIeBI+8GUviIM E6p3rnOJdIEoZW6+P6pSrkLiuDG4AJYvEAIHR9mS1KduNEE6GsDRAfDnyyaBLdqMtw NSbQz99Y0t4hdRqBJU199qSe+4m3OVkCmpe3ph6/v3lxMMYG0X2Exun3cMn+eLfldI 5S8hU09Bz/leT0137durWppOh2debYT13GIGdy6smmd7te0gu5yqAApjotNojiv+hH ER1f2dTb+llv5r77UzeW4VnxbgYqzpa4BLWnACap+GdLha41ra+Ax3170EOigdkIpa IRco/SAgxJ1dg== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1qVywl-0055Sd-VP; Tue, 15 Aug 2023 19:39:16 +0100 From: Marc Zyngier To: kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Catalin Marinas , Eric Auger , Mark Brown , Mark Rutland , Will Deacon , Alexandru Elisei , Andre Przywara , Chase Conklin , Ganapatrao Kulkarni , Darren Hart , Miguel Luis , Jing Zhang , James Morse , Suzuki K Poulose , Oliver Upton , Zenghui Yu Subject: [PATCH v4 03/28] arm64: Add missing DC ZVA/GVA/GZVA encodings Date: Tue, 15 Aug 2023 19:38:37 +0100 Message-Id: <20230815183903.2735724-4-maz@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230815183903.2735724-1-maz@kernel.org> References: <20230815183903.2735724-1-maz@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, catalin.marinas@arm.com, eric.auger@redhat.com, broonie@kernel.org, mark.rutland@arm.com, will@kernel.org, alexandru.elisei@arm.com, andre.przywara@arm.com, chase.conklin@arm.com, gankulkarni@os.amperecomputing.com, darren@os.amperecomputing.com, miguel.luis@oracle.com, jingzhangos@google.com, james.morse@arm.com, suzuki.poulose@arm.com, oliver.upton@linux.dev, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Add the missing DC *VA encodings. Reviewed-by: Eric Auger Reviewed-by: Miguel Luis Acked-by: Catalin Marinas Reviewed-by: Zenghui Yu Reviewed-by: Jing Zhang Signed-off-by: Marc Zyngier --- arch/arm64/include/asm/sysreg.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index ed2739897859..5084add86897 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -150,6 +150,11 @@ #define SYS_DC_CIGVAC sys_insn(1, 3, 7, 14, 3) #define SYS_DC_CIGDVAC sys_insn(1, 3, 7, 14, 5) +/* Data cache zero operations */ +#define SYS_DC_ZVA sys_insn(1, 3, 7, 4, 1) +#define SYS_DC_GVA sys_insn(1, 3, 7, 4, 3) +#define SYS_DC_GZVA sys_insn(1, 3, 7, 4, 4) + /* * Automatically generated definitions for system registers, the * manual encodings below are in the process of being converted to -- 2.34.1