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From: Raghavendra Rao Ananta <rananta@google.com>
To: Oliver Upton <oliver.upton@linux.dev>, Marc Zyngier <maz@kernel.org>
Cc: Alexandru Elisei <alexandru.elisei@arm.com>,
	James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Shaoqin Huang <shahuang@redhat.com>,
	Jing Zhang <jingzhangos@google.com>,
	Reiji Watanabe <reijiw@google.com>,
	Colton Lewis <coltonlewis@google.com>,
	Raghavendra Rao Anata <rananta@google.com>,
	linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
	linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Subject: [PATCH v5 03/12] KVM: arm64: PMU: Clear PM{C,I}NTEN{SET,CLR} and PMOVS{SET,CLR} on vCPU reset
Date: Thu, 17 Aug 2023 00:30:20 +0000	[thread overview]
Message-ID: <20230817003029.3073210-4-rananta@google.com> (raw)
In-Reply-To: <20230817003029.3073210-1-rananta@google.com>

From: Reiji Watanabe <reijiw@google.com>

On vCPU reset, PMCNTEN{SET,CLR}_EL0, PMINTEN{SET,CLR}_EL1, and
PMOVS{SET,CLR}_EL1 for a vCPU are reset by reset_pmu_reg().
This function clears RAZ bits of those registers corresponding
to unimplemented event counters on the vCPU, and sets bits
corresponding to implemented event counters to a predefined
pseudo UNKNOWN value (some bits are set to 1).

The function identifies (un)implemented event counters on the
vCPU based on the PMCR_EL0.N value on the host. Using the host
value for this would be problematic when KVM supports letting
userspace set PMCR_EL0.N to a value different from the host value
(some of the RAZ bits of those registers could end up being set to 1).

Fix this by clearing the registers so that it can ensure
that all the RAZ bits are cleared even when the PMCR_EL0.N value
for the vCPU is different from the host value. Use reset_val() to
do this instead of fixing reset_pmu_reg(), and remove
reset_pmu_reg(), as it is no longer used.

Signed-off-by: Reiji Watanabe <reijiw@google.com>
Signed-off-by: Raghavendra Rao Ananta <rananta@google.com>
---
 arch/arm64/kvm/sys_regs.c | 21 +--------------------
 1 file changed, 1 insertion(+), 20 deletions(-)

diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 2ca2973abe66f..9d3d44d165eed 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -717,25 +717,6 @@ static unsigned int pmu_visibility(const struct kvm_vcpu *vcpu,
 	return REG_HIDDEN;
 }
 
-static u64 reset_pmu_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
-{
-	u64 n, mask = BIT(ARMV8_PMU_CYCLE_IDX);
-
-	/* No PMU available, any PMU reg may UNDEF... */
-	if (!kvm_arm_support_pmu_v3())
-		return 0;
-
-	n = read_sysreg(pmcr_el0) >> ARMV8_PMU_PMCR_N_SHIFT;
-	n &= ARMV8_PMU_PMCR_N_MASK;
-	if (n)
-		mask |= GENMASK(n - 1, 0);
-
-	reset_unknown(vcpu, r);
-	__vcpu_sys_reg(vcpu, r->reg) &= mask;
-
-	return __vcpu_sys_reg(vcpu, r->reg);
-}
-
 static u64 reset_pmevcntr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
 {
 	reset_unknown(vcpu, r);
@@ -1115,7 +1096,7 @@ static bool access_pmuserenr(struct kvm_vcpu *vcpu, struct sys_reg_params *p,
 	  trap_wcr, reset_wcr, 0, 0,  get_wcr, set_wcr }
 
 #define PMU_SYS_REG(name)						\
-	SYS_DESC(SYS_##name), .reset = reset_pmu_reg,			\
+	SYS_DESC(SYS_##name), .reset = reset_val,			\
 	.visibility = pmu_visibility
 
 /* Macro to expand the PMEVCNTRn_EL0 register */
-- 
2.41.0.694.ge786442a9b-goog


  parent reply	other threads:[~2023-08-17  0:31 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-17  0:30 [PATCH v5 00/12] KVM: arm64: PMU: Allow userspace to limit the number of PMCs on vCPU Raghavendra Rao Ananta
2023-08-17  0:30 ` [PATCH v5 01/12] KVM: arm64: PMU: Introduce a helper to set the guest's PMU Raghavendra Rao Ananta
2023-09-15 19:22   ` Oliver Upton
2023-09-18 17:24     ` Raghavendra Rao Ananta
2023-08-17  0:30 ` [PATCH v5 02/12] KVM: arm64: PMU: Set the default PMU for the guest on vCPU reset Raghavendra Rao Ananta
2023-08-17  5:03   ` kernel test robot
2023-08-17  7:54   ` kernel test robot
2023-09-15 19:33   ` Oliver Upton
2023-09-18 16:41     ` Raghavendra Rao Ananta
2023-09-18 16:47       ` Oliver Upton
2023-09-18 16:58         ` Raghavendra Rao Ananta
2023-08-17  0:30 ` Raghavendra Rao Ananta [this message]
2023-08-17  0:30 ` [PATCH v5 04/12] KVM: arm64: PMU: Don't define the sysreg reset() for PM{USERENR,CCFILTR}_EL0 Raghavendra Rao Ananta
2023-08-17  0:30 ` [PATCH v5 05/12] KVM: arm64: PMU: Simplify extracting PMCR_EL0.N Raghavendra Rao Ananta
2023-08-17  6:38   ` kernel test robot
2023-09-15 19:56   ` Oliver Upton
2023-09-18 16:53     ` Raghavendra Rao Ananta
2023-08-17  0:30 ` [PATCH v5 06/12] KVM: arm64: PMU: Add a helper to read a vCPU's PMCR_EL0 Raghavendra Rao Ananta
2023-08-17  0:30 ` [PATCH v5 07/12] KVM: arm64: PMU: Set PMCR_EL0.N for vCPU based on the associated PMU Raghavendra Rao Ananta
2023-08-17  0:30 ` [PATCH v5 08/12] KVM: arm64: PMU: Allow userspace to limit PMCR_EL0.N for the guest Raghavendra Rao Ananta
2023-08-21 12:12   ` Shaoqin Huang
2023-08-21 23:28     ` Raghavendra Rao Ananta
2023-08-22  3:26       ` Shaoqin Huang
2023-09-15 20:36         ` Oliver Upton
2023-09-18 17:02           ` Raghavendra Rao Ananta
2023-08-22 10:05   ` Shaoqin Huang
2023-08-23 16:06     ` Raghavendra Rao Ananta
2023-08-24  8:50       ` Shaoqin Huang
2023-08-25 22:34         ` Raghavendra Rao Ananta
2023-08-26  2:40           ` Shaoqin Huang
2023-09-15 20:53   ` Oliver Upton
2023-09-15 21:54     ` Oliver Upton
2023-09-18 17:11       ` Raghavendra Rao Ananta
2023-09-18 17:22         ` Raghavendra Rao Ananta
2023-09-18 17:07     ` Raghavendra Rao Ananta
2023-08-17  0:30 ` [PATCH v5 09/12] tools: Import arm_pmuv3.h Raghavendra Rao Ananta
2023-08-17  0:30 ` [PATCH v5 10/12] KVM: selftests: aarch64: Introduce vpmu_counter_access test Raghavendra Rao Ananta
2023-09-15 21:00   ` Oliver Upton
2023-09-18 17:20     ` Raghavendra Rao Ananta
2023-08-17  0:30 ` [PATCH v5 11/12] KVM: selftests: aarch64: vPMU register test for implemented counters Raghavendra Rao Ananta
2023-08-17  0:30 ` [PATCH v5 12/12] KVM: selftests: aarch64: vPMU register test for unimplemented counters Raghavendra Rao Ananta

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