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From: Andrew Jones <ajones@ventanamicro.com>
To: Haibo Xu <haibo1.xu@intel.com>
Cc: xiaobo55x@gmail.com, Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Shuah Khan <shuah@kernel.org>, Marc Zyngier <maz@kernel.org>,
	Oliver Upton <oliver.upton@linux.dev>,
	James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Anup Patel <anup@brainfault.org>,
	Atish Patra <atishp@atishpatra.org>,
	Sean Christopherson <seanjc@google.com>,
	Ricardo Koller <ricarkol@google.com>,
	Vishal Annapurve <vannapurve@google.com>,
	Vipin Sharma <vipinsh@google.com>,
	David Matlack <dmatlack@google.com>,
	Thomas Huth <thuth@redhat.com>,
	Aaron Lewis <aaronlewis@google.com>,
	Colton Lewis <coltonlewis@google.com>,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	kvm@vger.kernel.org, linux-kselftest@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
	kvm-riscv@lists.infradead.org
Subject: Re: [PATCH v3 4/9] tools: riscv: Add header file csr.h
Date: Thu, 14 Sep 2023 10:14:05 +0200	[thread overview]
Message-ID: <20230914-90a562a03985a9a97afd953a@orel> (raw)
In-Reply-To: <119c9d06d64b7e4932c5f74a05af1e769cbe7da6.1694421911.git.haibo1.xu@intel.com>

On Thu, Sep 14, 2023 at 09:36:58AM +0800, Haibo Xu wrote:
> Borrow the csr definitions and operations from kernel's
> arch/riscv/include/asm/csr.h to tools/ for riscv. Since
> only 64bit was supported for RISC-V KVM selftests, add
> CONFIG_64BIT definition in kvm/Makefile to ensure only
> 64bit registers were available in csr.h.
> 
> Suggested-by: Andrew Jones <ajones@ventanamicro.com>
> Signed-off-by: Haibo Xu <haibo1.xu@intel.com>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> ---
>  tools/arch/riscv/include/asm/csr.h   | 521 +++++++++++++++++++++++++++
>  tools/testing/selftests/kvm/Makefile |   3 +
>  2 files changed, 524 insertions(+)
>  create mode 100644 tools/arch/riscv/include/asm/csr.h
> 
> diff --git a/tools/arch/riscv/include/asm/csr.h b/tools/arch/riscv/include/asm/csr.h
> new file mode 100644
> index 000000000000..4e86c82aacbd
> --- /dev/null
> +++ b/tools/arch/riscv/include/asm/csr.h
...
> diff --git a/tools/testing/selftests/kvm/Makefile b/tools/testing/selftests/kvm/Makefile
> index 0102a0297b84..89ecee2fdb73 100644
> --- a/tools/testing/selftests/kvm/Makefile
> +++ b/tools/testing/selftests/kvm/Makefile
> @@ -222,6 +222,9 @@ CFLAGS += -Wall -Wstrict-prototypes -Wuninitialized -O2 -g -std=gnu99 \
>  ifeq ($(ARCH),s390)
>  	CFLAGS += -march=z10
>  endif
> +ifeq ($(ARCH),riscv)
> +	CFLAGS += -DCONFIG_64BIT
> +endif

This should be a separate patch, since the "import csr.h to tools" should
be completely separate from anything else. Also, all architectures that
KVM selftests supports are 64-bit, so, as another completely separate
patch, I think we should just add CONFIG_64BIT to CFLAGS for all builds,
especially since there's a chance some of the includes the other
architectures are using may need it. Of course we'll need sign-off and
testing from the other arch maintainers.

Thanks,
drew

  reply	other threads:[~2023-09-14  8:14 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-14  1:36 [PATCH v3 0/9] RISCV: Add kvm Sstc timer selftests Haibo Xu
2023-09-14  1:36 ` [PATCH v3 1/9] KVM: selftests: Unify the codes for guest exception handling Haibo Xu
2023-09-14  1:36 ` [PATCH v3 2/9] KVM: selftests: Unify the makefile rule for split targets Haibo Xu
2023-09-14  8:46   ` Andrew Jones
2023-10-03 10:28   ` Andrew Jones
2023-10-08  2:58     ` Haibo Xu
2023-11-22  8:13       ` Andrew Jones
2023-11-23  2:50         ` Haibo Xu
2023-09-14  1:36 ` [PATCH v3 3/9] KVM: arm64: selftests: Split arch_timer test code Haibo Xu
2023-09-14  8:43   ` Andrew Jones
2023-09-14  1:36 ` [PATCH v3 4/9] tools: riscv: Add header file csr.h Haibo Xu
2023-09-14  8:14   ` Andrew Jones [this message]
2023-09-15  6:08     ` Haibo Xu
2023-09-14  1:36 ` [PATCH v3 5/9] KVM: riscv: selftests: Switch to use macro from csr.h Haibo Xu
2023-09-14  8:52   ` Andrew Jones
2023-09-15  6:13     ` Haibo Xu
2023-09-14  1:37 ` [PATCH v3 6/9] KVM: riscv: selftests: Add exception handling support Haibo Xu
2023-09-14  1:37 ` [PATCH v3 7/9] KVM: riscv: selftests: Add guest helper to get vcpu id Haibo Xu
2023-09-14  1:37 ` [PATCH v3 8/9] KVM: riscv: selftests: Change vcpu_has_ext to a common function Haibo Xu
2023-09-14  9:05   ` Andrew Jones
2023-09-15  6:14     ` Haibo Xu
2023-09-14  1:37 ` [PATCH v3 9/9] KVM: riscv: selftests: Add sstc timer test Haibo Xu
2023-09-14  9:36   ` Andrew Jones
2023-09-14  9:52     ` Conor Dooley
2023-09-14 10:15       ` Andrew Jones
2023-09-15  6:23         ` Haibo Xu
2023-09-14  9:51   ` Andrew Jones
2023-09-15  6:21     ` Haibo Xu
2023-12-04  2:42       ` Haibo Xu
2023-12-04 11:32         ` Andrew Jones
2023-12-05  7:58           ` Haibo Xu

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