From: Jim Mattson <jmattson@google.com>
To: kvm@vger.kernel.org, "'Sean Christopherson '" <seanjc@google.com>,
"'Paolo Bonzini '" <pbonzini@redhat.com>
Cc: Jim Mattson <jmattson@google.com>
Subject: [PATCH 3/3] KVM: selftests: Test behavior of HWCR
Date: Fri, 22 Sep 2023 09:42:39 -0700 [thread overview]
Message-ID: <20230922164239.2253604-3-jmattson@google.com> (raw)
In-Reply-To: <20230922164239.2253604-1-jmattson@google.com>
Verify the following:
* Any bits that read as one cannot be cleared
* Attempts to set bits 3, 6, 8, or 24 are ignored
* Bit 18 is the only bit that can be set
* Any bit that can be set can also be cleared
Signed-off-by: Jim Mattson <jmattson@google.com>
---
tools/testing/selftests/kvm/Makefile | 1 +
.../selftests/kvm/x86_64/hwcr_msr_test.c | 57 +++++++++++++++++++
2 files changed, 58 insertions(+)
create mode 100644 tools/testing/selftests/kvm/x86_64/hwcr_msr_test.c
diff --git a/tools/testing/selftests/kvm/Makefile b/tools/testing/selftests/kvm/Makefile
index a3bb36fb3cfc..6b0219ca65eb 100644
--- a/tools/testing/selftests/kvm/Makefile
+++ b/tools/testing/selftests/kvm/Makefile
@@ -135,6 +135,7 @@ TEST_GEN_PROGS_x86_64 += set_memory_region_test
TEST_GEN_PROGS_x86_64 += steal_time
TEST_GEN_PROGS_x86_64 += kvm_binary_stats_test
TEST_GEN_PROGS_x86_64 += system_counter_offset_test
+TEST_GEN_PROGS_x86_64 += x86_64/hwcr_msr_test
# Compiled outputs used by test targets
TEST_GEN_PROGS_EXTENDED_x86_64 += x86_64/nx_huge_pages_test
diff --git a/tools/testing/selftests/kvm/x86_64/hwcr_msr_test.c b/tools/testing/selftests/kvm/x86_64/hwcr_msr_test.c
new file mode 100644
index 000000000000..123267b44daf
--- /dev/null
+++ b/tools/testing/selftests/kvm/x86_64/hwcr_msr_test.c
@@ -0,0 +1,57 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2023, Google LLC.
+ *
+ * Tests for the K7_HWCR MSR.
+ */
+
+#define _GNU_SOURCE /* for program_invocation_short_name */
+#include <sys/ioctl.h>
+
+#include "test_util.h"
+#include "kvm_util.h"
+#include "vmx.h"
+
+void test_hwcr_bit(struct kvm_vcpu *vcpu, unsigned int bit)
+{
+ const unsigned long long ignored =
+ BIT_ULL(3) | BIT_ULL(6) | BIT_ULL(8) | BIT_ULL(24);
+ const unsigned long long legal = ignored | BIT_ULL(18);
+ uint64_t orig = vcpu_get_msr(vcpu, MSR_K7_HWCR);
+ uint64_t val = BIT_ULL(bit);
+ uint64_t check;
+ int r;
+
+ r = _vcpu_set_msr(vcpu, MSR_K7_HWCR, val);
+ TEST_ASSERT((r == 1 && (val & legal)) || (r == 0 && !(val & legal)),
+ "Unexpected result (%d) when setting HWCR[bit %u]", r, bit);
+ check = vcpu_get_msr(vcpu, MSR_K7_HWCR);
+ if (val & (legal & ~ignored)) {
+ TEST_ASSERT(check == (orig | val),
+ "Bit %u: unexpected HWCR %lx; expected %lx", bit,
+ check, orig | val);
+ _vcpu_set_msr(vcpu, MSR_K7_HWCR, 0);
+ check = vcpu_get_msr(vcpu, MSR_K7_HWCR);
+ TEST_ASSERT(check == orig,
+ "Bit %u: unexpected HWCR %lx; expected %lx", bit,
+ check, orig);
+ } else {
+ TEST_ASSERT(check == orig,
+ "Bit %u: unexpected HWCR %lx; expected %lx", bit,
+ check, orig);
+ }
+}
+
+int main(int argc, char *argv[])
+{
+ struct kvm_vm *vm;
+ struct kvm_vcpu *vcpu;
+ unsigned int bit;
+
+ vm = vm_create_with_one_vcpu(&vcpu, NULL);
+
+ for (bit = 0; bit < BITS_PER_LONG; bit++)
+ test_hwcr_bit(vcpu, bit);
+
+ kvm_vm_free(vm);
+}
--
2.42.0.515.g380fc7ccd1-goog
prev parent reply other threads:[~2023-09-22 16:42 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-22 16:42 [PATCH 1/3] KVM: x86: Allow HWCR.McStatusWrEn to be cleared once set Jim Mattson
2023-09-22 16:42 ` [PATCH 2/3] KVM: x86: Virtualize HWCR.TscFreqSel[bit 24] Jim Mattson
2023-09-22 17:21 ` Sean Christopherson
2023-09-22 17:48 ` Jim Mattson
2023-09-22 18:15 ` Sean Christopherson
2023-09-22 18:27 ` Jim Mattson
2023-09-22 19:40 ` Sean Christopherson
2023-09-22 20:16 ` Jim Mattson
2023-09-22 20:51 ` Sean Christopherson
2023-09-22 16:42 ` Jim Mattson [this message]
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