kvm.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Jason Gunthorpe <jgg@nvidia.com>
To: "Tian, Kevin" <kevin.tian@intel.com>
Cc: "Liu, Yi L" <yi.l.liu@intel.com>,
	"joro@8bytes.org" <joro@8bytes.org>,
	"alex.williamson@redhat.com" <alex.williamson@redhat.com>,
	"robin.murphy@arm.com" <robin.murphy@arm.com>,
	"baolu.lu@linux.intel.com" <baolu.lu@linux.intel.com>,
	"cohuck@redhat.com" <cohuck@redhat.com>,
	"eric.auger@redhat.com" <eric.auger@redhat.com>,
	"nicolinc@nvidia.com" <nicolinc@nvidia.com>,
	"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
	"mjrosato@linux.ibm.com" <mjrosato@linux.ibm.com>,
	"chao.p.peng@linux.intel.com" <chao.p.peng@linux.intel.com>,
	"yi.y.sun@linux.intel.com" <yi.y.sun@linux.intel.com>,
	"peterx@redhat.com" <peterx@redhat.com>,
	"jasowang@redhat.com" <jasowang@redhat.com>,
	"shameerali.kolothum.thodi@huawei.com"
	<shameerali.kolothum.thodi@huawei.com>,
	"lulu@redhat.com" <lulu@redhat.com>,
	"suravee.suthikulpanit@amd.com" <suravee.suthikulpanit@amd.com>,
	"iommu@lists.linux.dev" <iommu@lists.linux.dev>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-kselftest@vger.kernel.org"
	<linux-kselftest@vger.kernel.org>,
	"Duan, Zhenzhong" <zhenzhong.duan@intel.com>,
	"joao.m.martins@oracle.com" <joao.m.martins@oracle.com>,
	"Zeng, Xin" <xin.zeng@intel.com>,
	"Zhao, Yan Y" <yan.y.zhao@intel.com>
Subject: Re: [PATCH v7 1/3] iommufd: Add data structure for Intel VT-d stage-1 cache invalidation
Date: Fri, 5 Jan 2024 10:45:16 -0400	[thread overview]
Message-ID: <20240105144516.GC50406@nvidia.com> (raw)
In-Reply-To: <BN9PR11MB52769EEDAE2783426144E2588C662@BN9PR11MB5276.namprd11.prod.outlook.com>

On Fri, Jan 05, 2024 at 02:52:50AM +0000, Tian, Kevin wrote:
> > but in reality the relation could be identified in an easy way due to a SIOV
> > restriction which we discussed before - shared PASID space of PF disallows
> > assigning sibling vdev's to a same VM (otherwise no way to identify which
> > sibling vdev triggering an iopf when a pasid is used on both vdev's). That
> > restriction implies that within an iommufd context every iommufd_device
> > object should contain a unique struct device pointer. So PASID can be
> > instead ignored in the lookup then just always do iommufd_get_dev_id()
> > using struct device.
> 
> A bit more background.
> 
> Previously we thought this restriction only applies to SIOV+vSVA, as
> a guest process may bind to both sibling vdev's, leading to the same
> pasid situation.
> 
> In concept w/o vSVA it's still possible to assign sibling vdev's to
> a same VM as each vdev is allocated with a unique pasid to mark vRID
> so can be differentiated from each other in the fault/error path.

I thought the SIOV plan was that each "vdev" ie vpci function would
get a slice of the pRID's PASID space statically selected at creation?

So SVA/etc doesn't matter, you reliably get a disjoint set of pRID &
pPASID into each VM.

From that view you can't identify the iommufd dev_id without knowing
both the pRID and pPASID which will disambiguate the different SIOV
iommufd dev_id instances sharing a rid.

> But when looking at this err code issue with Yi closely, we found
> there is another gap in the VT-d spec. Upon devtlb invalidation
> timeout the hw doesn't report pasid in the error info register. this
> makes it impossible to identify the source vdev if a hwpt invalidation
> request involves sibling vdev's from a same PF.

Don't you know which command timed out?
 
> with that I'm inclined to always imposing this restriction for SIOV. 
> One may argue that SIOV w/o vSVA w/o devtlb is conceptually immune
> but I'm with you that given SIOVr1 is one-off I prefer to limiting its
> usability other than complexing the kernel.

By this you mean give up on SIOV entirely and always assign the full
pRID to an entire VM? I'm confused what restriction you mean if you
can't rely on the PASID?

Jason

  reply	other threads:[~2024-01-05 14:45 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-17 13:18 [PATCH v7 0/3] Add Intel VT-d nested translation (part 2/2) Yi Liu
2023-11-17 13:18 ` [PATCH v7 1/3] iommufd: Add data structure for Intel VT-d stage-1 cache invalidation Yi Liu
2023-11-20  8:26   ` Tian, Kevin
2023-11-20 23:04     ` Jason Gunthorpe
2023-11-21  2:54       ` Tian, Kevin
2023-11-21 12:17         ` Jason Gunthorpe
2023-11-22  2:32           ` Baolu Lu
2023-11-22  3:52             ` Yi Liu
2023-11-22  4:58           ` Tian, Kevin
2023-11-22 13:25             ` Jason Gunthorpe
2023-11-24  3:00               ` Tian, Kevin
2023-11-24 13:46                 ` Jason Gunthorpe
2023-12-14 11:26   ` Yi Liu
2023-12-15  1:50     ` Tian, Kevin
2023-12-15  2:28       ` Nicolin Chen
2023-12-15  3:04         ` Tian, Kevin
2023-12-15  3:32           ` Nicolin Chen
2023-12-15  4:01             ` Yi Liu
2023-12-16 18:49               ` Nicolin Chen
2023-12-17 23:28                 ` Tian, Kevin
2024-01-02 23:38               ` Jason Gunthorpe
2024-01-03  2:24                 ` Yi Liu
2024-01-03 16:01                   ` Jason Gunthorpe
2024-01-03 16:48                     ` Nicolin Chen
2024-01-03 16:58                       ` Jason Gunthorpe
2024-01-03 17:06                         ` Nicolin Chen
2024-01-03 17:52                           ` Jason Gunthorpe
2024-01-03 20:18                             ` Nicolin Chen
2024-01-04  0:02                               ` Jason Gunthorpe
2024-01-05  7:38                                 ` Nicolin Chen
2024-01-05 15:46                                   ` Jason Gunthorpe
2024-01-02 17:46       ` Jason Gunthorpe
2024-01-04 14:36     ` Jason Gunthorpe
2024-01-05  2:16       ` Tian, Kevin
2024-01-05  2:52       ` Tian, Kevin
2024-01-05 14:45         ` Jason Gunthorpe [this message]
2024-01-08  4:07           ` Tian, Kevin
2024-01-08 13:51             ` Jason Gunthorpe
2024-01-09  6:00             ` Yi Liu
2023-11-17 13:18 ` [PATCH v7 2/3] iommu/vt-d: Make iotlb flush helpers to be extern Yi Liu
2023-11-17 13:18 ` [PATCH v7 3/3] iommu/vt-d: Add iotlb flush for nested domain Yi Liu
2023-11-20  8:32   ` Tian, Kevin
2023-12-12  3:58     ` Yi Liu
2023-12-06 18:56   ` Jason Gunthorpe
2023-12-12  3:59     ` Yi Liu

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20240105144516.GC50406@nvidia.com \
    --to=jgg@nvidia.com \
    --cc=alex.williamson@redhat.com \
    --cc=baolu.lu@linux.intel.com \
    --cc=chao.p.peng@linux.intel.com \
    --cc=cohuck@redhat.com \
    --cc=eric.auger@redhat.com \
    --cc=iommu@lists.linux.dev \
    --cc=jasowang@redhat.com \
    --cc=joao.m.martins@oracle.com \
    --cc=joro@8bytes.org \
    --cc=kevin.tian@intel.com \
    --cc=kvm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-kselftest@vger.kernel.org \
    --cc=lulu@redhat.com \
    --cc=mjrosato@linux.ibm.com \
    --cc=nicolinc@nvidia.com \
    --cc=peterx@redhat.com \
    --cc=robin.murphy@arm.com \
    --cc=shameerali.kolothum.thodi@huawei.com \
    --cc=suravee.suthikulpanit@amd.com \
    --cc=xin.zeng@intel.com \
    --cc=yan.y.zhao@intel.com \
    --cc=yi.l.liu@intel.com \
    --cc=yi.y.sun@linux.intel.com \
    --cc=zhenzhong.duan@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).