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From: Jason Gunthorpe <jgg@nvidia.com>
To: "Tian, Kevin" <kevin.tian@intel.com>
Cc: "Liu, Yi L" <yi.l.liu@intel.com>,
	"joro@8bytes.org" <joro@8bytes.org>,
	"alex.williamson@redhat.com" <alex.williamson@redhat.com>,
	"robin.murphy@arm.com" <robin.murphy@arm.com>,
	"baolu.lu@linux.intel.com" <baolu.lu@linux.intel.com>,
	"cohuck@redhat.com" <cohuck@redhat.com>,
	"eric.auger@redhat.com" <eric.auger@redhat.com>,
	"nicolinc@nvidia.com" <nicolinc@nvidia.com>,
	"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
	"mjrosato@linux.ibm.com" <mjrosato@linux.ibm.com>,
	"chao.p.peng@linux.intel.com" <chao.p.peng@linux.intel.com>,
	"yi.y.sun@linux.intel.com" <yi.y.sun@linux.intel.com>,
	"peterx@redhat.com" <peterx@redhat.com>,
	"jasowang@redhat.com" <jasowang@redhat.com>,
	"shameerali.kolothum.thodi@huawei.com"
	<shameerali.kolothum.thodi@huawei.com>,
	"lulu@redhat.com" <lulu@redhat.com>,
	"suravee.suthikulpanit@amd.com" <suravee.suthikulpanit@amd.com>,
	"iommu@lists.linux.dev" <iommu@lists.linux.dev>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-kselftest@vger.kernel.org"
	<linux-kselftest@vger.kernel.org>,
	"Duan, Zhenzhong" <zhenzhong.duan@intel.com>,
	"joao.m.martins@oracle.com" <joao.m.martins@oracle.com>,
	"Zeng, Xin" <xin.zeng@intel.com>,
	"Zhao, Yan Y" <yan.y.zhao@intel.com>
Subject: Re: [PATCH v7 1/3] iommufd: Add data structure for Intel VT-d stage-1 cache invalidation
Date: Mon, 8 Jan 2024 09:51:32 -0400	[thread overview]
Message-ID: <20240108135132.GI50406@nvidia.com> (raw)
In-Reply-To: <BN9PR11MB52765C91893A28A7D21D324E8C6B2@BN9PR11MB5276.namprd11.prod.outlook.com>

On Mon, Jan 08, 2024 at 04:07:12AM +0000, Tian, Kevin wrote:
> > > In concept w/o vSVA it's still possible to assign sibling vdev's to
> > > a same VM as each vdev is allocated with a unique pasid to mark vRID
> > > so can be differentiated from each other in the fault/error path.
> > 
> > I thought the SIOV plan was that each "vdev" ie vpci function would
> > get a slice of the pRID's PASID space statically selected at creation?
> > 
> > So SVA/etc doesn't matter, you reliably get a disjoint set of pRID &
> > pPASID into each VM.
> > 
> > From that view you can't identify the iommufd dev_id without knowing
> > both the pRID and pPASID which will disambiguate the different SIOV
> > iommufd dev_id instances sharing a rid.
> 
> true when assigning those instances to different VMs.
> 
> Here I was talking about assigning them to a same VM being a problem.
> with rid sharing plus same ENQCMD pPASID potentially used on both
> instances there'd be ambiguity in vSVA e.g. iopf to identify dev_id.

Oh you imaging sharing the pPASID if things have the same translation?
I guess I can see why, but given where things are overall I'd say just
don't do that.

Indeed we can't do that because it makes the vRID unknowable.

(again I continue to think that vt-d cache design is messed up, using
the PASID for the cache tag is a *terrible* design, and causes exactly
these kinds of problems)

> for errors related to descriptor fetch the driver can tell the command
> by looking at the head pointer of the invalidation queue.
> 
> command completion is indirectly detected by inserting a wait descriptor
> as fence. completion timeout error is reported in an error register. but
> this register doesn't record pasid, nor does the command location. if there
> are multiple pending devtlb invalidation commands upon timeout 
> error the spec suggests the driver to treat all of them timeout as the
> register can only record one rid.

Makes sense, or at least you have to re-issue them one by one

> this is kind of moot. If the driver submits only one command (plus wait)
> at a time it doesn't need hw's help to identify the timeout command. 
> If the driver batches invalidation commands it must treat all timeout if
> an timeout error is reported.

Yes
 
> from this angle whether to record pasid doesn't really matter.

At least for error handling..
 
Jason

  reply	other threads:[~2024-01-08 13:51 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-17 13:18 [PATCH v7 0/3] Add Intel VT-d nested translation (part 2/2) Yi Liu
2023-11-17 13:18 ` [PATCH v7 1/3] iommufd: Add data structure for Intel VT-d stage-1 cache invalidation Yi Liu
2023-11-20  8:26   ` Tian, Kevin
2023-11-20 23:04     ` Jason Gunthorpe
2023-11-21  2:54       ` Tian, Kevin
2023-11-21 12:17         ` Jason Gunthorpe
2023-11-22  2:32           ` Baolu Lu
2023-11-22  3:52             ` Yi Liu
2023-11-22  4:58           ` Tian, Kevin
2023-11-22 13:25             ` Jason Gunthorpe
2023-11-24  3:00               ` Tian, Kevin
2023-11-24 13:46                 ` Jason Gunthorpe
2023-12-14 11:26   ` Yi Liu
2023-12-15  1:50     ` Tian, Kevin
2023-12-15  2:28       ` Nicolin Chen
2023-12-15  3:04         ` Tian, Kevin
2023-12-15  3:32           ` Nicolin Chen
2023-12-15  4:01             ` Yi Liu
2023-12-16 18:49               ` Nicolin Chen
2023-12-17 23:28                 ` Tian, Kevin
2024-01-02 23:38               ` Jason Gunthorpe
2024-01-03  2:24                 ` Yi Liu
2024-01-03 16:01                   ` Jason Gunthorpe
2024-01-03 16:48                     ` Nicolin Chen
2024-01-03 16:58                       ` Jason Gunthorpe
2024-01-03 17:06                         ` Nicolin Chen
2024-01-03 17:52                           ` Jason Gunthorpe
2024-01-03 20:18                             ` Nicolin Chen
2024-01-04  0:02                               ` Jason Gunthorpe
2024-01-05  7:38                                 ` Nicolin Chen
2024-01-05 15:46                                   ` Jason Gunthorpe
2024-01-02 17:46       ` Jason Gunthorpe
2024-01-04 14:36     ` Jason Gunthorpe
2024-01-05  2:16       ` Tian, Kevin
2024-01-05  2:52       ` Tian, Kevin
2024-01-05 14:45         ` Jason Gunthorpe
2024-01-08  4:07           ` Tian, Kevin
2024-01-08 13:51             ` Jason Gunthorpe [this message]
2024-01-09  6:00             ` Yi Liu
2023-11-17 13:18 ` [PATCH v7 2/3] iommu/vt-d: Make iotlb flush helpers to be extern Yi Liu
2023-11-17 13:18 ` [PATCH v7 3/3] iommu/vt-d: Add iotlb flush for nested domain Yi Liu
2023-11-20  8:32   ` Tian, Kevin
2023-12-12  3:58     ` Yi Liu
2023-12-06 18:56   ` Jason Gunthorpe
2023-12-12  3:59     ` Yi Liu

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