From: Mingwei Zhang <mizhang@google.com>
To: Paolo Bonzini <pbonzini@redhat.com>,
Sean Christopherson <seanjc@google.com>
Cc: kvm@vger.kernel.org, Mingwei Zhang <mizhang@google.com>
Subject: [kvm-unit-tests PATCH v2 1/2] x86: Add FEP support on read/write register instructions
Date: Wed, 17 Apr 2024 23:29:05 +0000 [thread overview]
Message-ID: <20240417232906.3057638-2-mizhang@google.com> (raw)
In-Reply-To: <20240417232906.3057638-1-mizhang@google.com>
Add FEP support on read/write register instructions to enable testing rdmsr
and wrmsr when force emulation is turned on.
Suggested-by: Sean Christopherson <seanjc@google.com>
Signed-off-by: Mingwei Zhang <mizhang@google.com>
---
lib/x86/desc.h | 30 ++++++++++++++++++++++++------
lib/x86/processor.h | 18 ++++++++++++++----
2 files changed, 38 insertions(+), 10 deletions(-)
diff --git a/lib/x86/desc.h b/lib/x86/desc.h
index 7778a0f8..92c45a48 100644
--- a/lib/x86/desc.h
+++ b/lib/x86/desc.h
@@ -272,9 +272,9 @@ extern gdt_entry_t *get_tss_descr(void);
extern unsigned long get_gdt_entry_base(gdt_entry_t *entry);
extern unsigned long get_gdt_entry_limit(gdt_entry_t *entry);
-#define asm_safe(insn, inputs...) \
+#define __asm_safe(fep, insn, inputs...) \
({ \
- asm volatile(ASM_TRY("1f") \
+ asm volatile(__ASM_TRY(fep, "1f") \
insn "\n\t" \
"1:\n\t" \
: \
@@ -283,9 +283,15 @@ extern unsigned long get_gdt_entry_limit(gdt_entry_t *entry);
exception_vector(); \
})
-#define asm_safe_out1(insn, output, inputs...) \
+#define asm_safe(insn, inputs...) \
+ __asm_safe("", insn, inputs)
+
+#define asm_fep_safe(insn, output, inputs...) \
+ __asm_safe_out1(KVM_FEP, insn, output, inputs)
+
+#define __asm_safe_out1(fep, insn, output, inputs...) \
({ \
- asm volatile(ASM_TRY("1f") \
+ asm volatile(__ASM_TRY(fep, "1f") \
insn "\n\t" \
"1:\n\t" \
: output \
@@ -294,9 +300,15 @@ extern unsigned long get_gdt_entry_limit(gdt_entry_t *entry);
exception_vector(); \
})
-#define asm_safe_out2(insn, output1, output2, inputs...) \
+#define asm_safe_out1(insn, output, inputs...) \
+ __asm_safe_out1("", insn, output, inputs)
+
+#define asm_fep_safe_out1(insn, output, inputs...) \
+ __asm_safe_out1(KVM_FEP, insn, output, inputs)
+
+#define __asm_safe_out2(fep, insn, output1, output2, inputs...) \
({ \
- asm volatile(ASM_TRY("1f") \
+ asm volatile(__ASM_TRY(fep, "1f") \
insn "\n\t" \
"1:\n\t" \
: output1, output2 \
@@ -305,6 +317,12 @@ extern unsigned long get_gdt_entry_limit(gdt_entry_t *entry);
exception_vector(); \
})
+#define asm_safe_out2(fep, insn, output1, output2, inputs...) \
+ __asm_safe_out2("", insn, output1, output2, inputs)
+
+#define asm_fep_safe_out2(insn, output1, output2, inputs...) \
+ __asm_safe_out2(KVM_FEP, insn, output1, output2, inputs)
+
#define __asm_safe_report(want, insn, inputs...) \
do { \
int vector = asm_safe(insn, inputs); \
diff --git a/lib/x86/processor.h b/lib/x86/processor.h
index 44f4fd1e..d20496c0 100644
--- a/lib/x86/processor.h
+++ b/lib/x86/processor.h
@@ -430,12 +430,12 @@ static inline void wrmsr(u32 index, u64 val)
asm volatile ("wrmsr" : : "a"(a), "d"(d), "c"(index) : "memory");
}
-#define rdreg64_safe(insn, index, val) \
+#define __rdreg64_safe(fep, insn, index, val) \
({ \
uint32_t a, d; \
int vector; \
\
- vector = asm_safe_out2(insn, "=a"(a), "=d"(d), "c"(index)); \
+ vector = __asm_safe_out2(fep, insn, "=a"(a), "=d"(d), "c"(index));\
\
if (vector) \
*(val) = 0; \
@@ -444,13 +444,18 @@ static inline void wrmsr(u32 index, u64 val)
vector; \
})
-#define wrreg64_safe(insn, index, val) \
+#define rdreg64_safe(insn, index, val) \
+ __rdreg64_safe("", insn, index, val)
+
+#define __wrreg64_safe(fep, insn, index, val) \
({ \
uint32_t eax = (val), edx = (val) >> 32; \
\
- asm_safe(insn, "a" (eax), "d" (edx), "c" (index)); \
+ __asm_safe(fep, insn, "a" (eax), "d" (edx), "c" (index)); \
})
+#define wrreg64_safe(insn, index, val) \
+ __wrreg64_safe("", insn, index, val)
static inline int rdmsr_safe(u32 index, uint64_t *val)
{
@@ -462,6 +467,11 @@ static inline int wrmsr_safe(u32 index, u64 val)
return wrreg64_safe("wrmsr", index, val);
}
+static inline int wrmsr_fep_safe(u32 index, u64 val)
+{
+ return __wrreg64_safe(KVM_FEP, "wrmsr", index, val);
+}
+
static inline int rdpmc_safe(u32 index, uint64_t *val)
{
return rdreg64_safe("rdpmc", index, val);
--
2.44.0.683.g7961c838ac-goog
next prev parent reply other threads:[~2024-04-17 23:29 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-17 23:29 [kvm-unit-tests PATCH v2 0/2] Fix testing failure in x86/msr Mingwei Zhang
2024-04-17 23:29 ` Mingwei Zhang [this message]
2024-04-17 23:29 ` [kvm-unit-tests PATCH v2 2/2] x86: msr: testing MSR_IA32_FLUSH_CMD reserved bits only in KVM emulation Mingwei Zhang
2024-04-25 20:05 ` [kvm-unit-tests PATCH v2 0/2] Fix testing failure in x86/msr Mingwei Zhang
2024-06-05 23:20 ` Sean Christopherson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240417232906.3057638-2-mizhang@google.com \
--to=mizhang@google.com \
--cc=kvm@vger.kernel.org \
--cc=pbonzini@redhat.com \
--cc=seanjc@google.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox