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From: Dapeng Mi <dapeng1.mi@linux.intel.com>
To: Sean Christopherson <seanjc@google.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Jim Mattson <jmattson@google.com>,
	Mingwei Zhang <mizhang@google.com>
Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
	Xiong Zhang <xiong.y.zhang@intel.com>,
	Zhenyu Wang <zhenyuw@linux.intel.com>,
	Like Xu <like.xu.linux@gmail.com>,
	Jinrong Liang <cloudliang@tencent.com>,
	Dapeng Mi <dapeng1.mi@intel.com>,
	Dapeng Mi <dapeng1.mi@linux.intel.com>
Subject: [kvm-unit-tests Patch v4 07/17] x86: pmu: Fix cycles event validation failure
Date: Fri, 19 Apr 2024 11:52:23 +0800	[thread overview]
Message-ID: <20240419035233.3837621-8-dapeng1.mi@linux.intel.com> (raw)
In-Reply-To: <20240419035233.3837621-1-dapeng1.mi@linux.intel.com>

When running pmu test on SPR, sometimes the following failure is
reported.

PMU version:         2
GP counters:         8
GP counter width:    48
Mask length:         8
Fixed counters:      3
Fixed counter width: 48
1000000 <= 55109398 <= 50000000
FAIL: Intel: core cycles-0
1000000 <= 18279571 <= 50000000
PASS: Intel: core cycles-1
1000000 <= 12238092 <= 50000000
PASS: Intel: core cycles-2
1000000 <= 7981727 <= 50000000
PASS: Intel: core cycles-3
1000000 <= 6984711 <= 50000000
PASS: Intel: core cycles-4
1000000 <= 6773673 <= 50000000
PASS: Intel: core cycles-5
1000000 <= 6697842 <= 50000000
PASS: Intel: core cycles-6
1000000 <= 6747947 <= 50000000
PASS: Intel: core cycles-7

The count of the "core cycles" on first counter would exceed the upper
boundary and leads to a failure, and then the "core cycles" count would
drop gradually and reach a stable state.

That looks reasonable. The "core cycles" event is defined as the 1st
event in xxx_gp_events[] array and it is always verified at first.
when the program loop() is executed at the first time it needs to warm
up the pipeline and cache, such as it has to wait for cache is filled.
All these warm-up work leads to a quite large core cycles count which
may exceeds the verification range.

To avoid the false positive of cycles event caused by warm-up,
explicitly introduce a warm-up state before really starting
verification.

Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
---
 x86/pmu.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/x86/pmu.c b/x86/pmu.c
index 461a4090d475..43ef7ecbcaea 100644
--- a/x86/pmu.c
+++ b/x86/pmu.c
@@ -591,11 +591,27 @@ static void check_tsx_cycles(void)
 	report_prefix_pop();
 }
 
+static void warm_up(void)
+{
+	int i = 8;
+
+	/*
+	 * Since cycles event is always run as the first event, there would be
+	 * a warm-up state to warm up the cache, it leads to the measured cycles
+	 * value may exceed the pre-defined cycles upper boundary and cause
+	 * false positive. To avoid this, introduce an warm-up state before
+	 * the real verification.
+	 */
+	while (i--)
+		loop();
+}
+
 static void check_counters(void)
 {
 	if (is_fep_available())
 		check_emulated_instr();
 
+	warm_up();
 	check_gp_counters();
 	check_fixed_counters();
 	check_rdpmc();
-- 
2.34.1


  parent reply	other threads:[~2024-04-19  3:45 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-19  3:52 [kvm-unit-tests Patch v4 00/17] pmu test bugs fix and improvements Dapeng Mi
2024-04-19  3:52 ` [kvm-unit-tests Patch v4 01/17] x86: pmu: Remove duplicate code in pmu_init() Dapeng Mi
2024-04-19  3:52 ` [kvm-unit-tests Patch v4 02/17] x86: pmu: Remove blank line and redundant space Dapeng Mi
2024-04-19  3:52 ` [kvm-unit-tests Patch v4 03/17] x86: pmu: Refine fixed_events[] names Dapeng Mi
2024-04-19  3:52 ` [kvm-unit-tests Patch v4 04/17] x86: pmu: Fix the issue that pmu_counter_t.config crosses cache line Dapeng Mi
2024-04-19  3:52 ` [kvm-unit-tests Patch v4 05/17] x86: pmu: Enlarge cnt[] length to 48 in check_counters_many() Dapeng Mi
2024-04-19  3:52 ` [kvm-unit-tests Patch v4 06/17] x86: pmu: Add asserts to warn inconsistent fixed events and counters Dapeng Mi
2024-04-19  3:52 ` Dapeng Mi [this message]
2024-04-19  3:52 ` [kvm-unit-tests Patch v4 08/17] x86: pmu: Use macro to replace hard-coded branches event index Dapeng Mi
2024-04-19  3:52 ` [kvm-unit-tests Patch v4 09/17] x86: pmu: Use macro to replace hard-coded ref-cycles " Dapeng Mi
2024-04-19  3:52 ` [kvm-unit-tests Patch v4 10/17] x86: pmu: Use macro to replace hard-coded instructions " Dapeng Mi
2024-04-19  3:52 ` [kvm-unit-tests Patch v4 11/17] x86: pmu: Enable and disable PMCs in loop() asm blob Dapeng Mi
2024-04-19  3:52 ` [kvm-unit-tests Patch v4 12/17] x86: pmu: Improve instruction and branches events verification Dapeng Mi
2024-04-19  3:52 ` [kvm-unit-tests Patch v4 13/17] x86: pmu: Improve LLC misses event verification Dapeng Mi
2024-04-19  3:52 ` [kvm-unit-tests Patch v4 14/17] x86: pmu: Adjust lower boundary of llc-misses event to 0 for legacy CPUs Dapeng Mi
2024-04-19  3:52 ` [kvm-unit-tests Patch v4 15/17] x86: pmu: Add IBPB indirect jump asm blob Dapeng Mi
2024-04-19  3:52 ` [kvm-unit-tests Patch v4 16/17] x86: pmu: Adjust lower boundary of branch-misses event Dapeng Mi
2024-04-19  3:52 ` [kvm-unit-tests Patch v4 17/17] x86: pmu: Optimize emulated instruction validation Dapeng Mi

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