From: "Clément Léger" <cleger@rivosinc.com>
To: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org
Cc: "Clément Léger" <cleger@rivosinc.com>,
"Andrew Jones" <ajones@ventanamicro.com>,
"Anup Patel" <apatel@ventanamicro.com>,
"Atish Patra" <atishp@rivosinc.com>
Subject: [kvm-unit-tests PATCH v1 0/4] riscv: add SBI SSE extension tests
Date: Fri, 17 May 2024 15:40:01 +0200 [thread overview]
Message-ID: <20240517134007.928539-1-cleger@rivosinc.com> (raw)
This series adds an individual test for SBI SSE extension as well as
needed infrastructure for SSE support.
Clément Léger (4):
riscv: move REG_L/REG_W in a dedicated asm.h file
riscv: add SBI SSE extension definitions
riscv: add SSE assembly entry handling
riscv: add SBI SSE extension tests
riscv/Makefile | 2 +
lib/riscv/asm/asm.h | 19 +
lib/riscv/asm/csr.h | 2 +
lib/riscv/asm/sbi.h | 76 ++++
lib/riscv/asm/sse.h | 16 +
lib/riscv/sse_entry.S | 100 ++++
lib/riscv/asm-offsets.c | 9 +
riscv/cstart.S | 14 +-
riscv/sbi_sse.c | 983 ++++++++++++++++++++++++++++++++++++++++
riscv/unittests.cfg | 4 +
10 files changed, 1212 insertions(+), 13 deletions(-)
create mode 100644 lib/riscv/asm/asm.h
create mode 100644 lib/riscv/asm/sse.h
create mode 100644 lib/riscv/sse_entry.S
create mode 100644 riscv/sbi_sse.c
--
2.43.0
next reply other threads:[~2024-05-17 13:40 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-17 13:40 Clément Léger [this message]
2024-05-17 13:40 ` [kvm-unit-tests PATCH v1 1/4] riscv: move REG_L/REG_W in a dedicated asm.h file Clément Léger
2024-08-07 15:21 ` Andrew Jones
2024-05-17 13:40 ` [kvm-unit-tests PATCH v1 2/4] riscv: add SBI SSE extension definitions Clément Léger
2024-05-17 13:40 ` [kvm-unit-tests PATCH v1 3/4] riscv: add SSE assembly entry handling Clément Léger
2024-05-17 13:40 ` [kvm-unit-tests PATCH v1 4/4] riscv: add SBI SSE extension tests Clément Léger
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