From: Jason Gunthorpe <jgg@ziepe.ca>
To: Gerd Bayer <gbayer@linux.ibm.com>
Cc: Ramesh Thomas <ramesh.thomas@intel.com>,
Alex Williamson <alex.williamson@redhat.com>,
Niklas Schnelle <schnelle@linux.ibm.com>,
kvm@vger.kernel.org, linux-s390@vger.kernel.org,
Ankit Agrawal <ankita@nvidia.com>,
Yishai Hadas <yishaih@nvidia.com>,
Halil Pasic <pasic@linux.ibm.com>,
Julian Ruess <julianr@linux.ibm.com>,
Ben Segal <bpsegal@us.ibm.com>
Subject: Re: [PATCH v3 2/3] vfio/pci: Support 8-byte PCI loads and stores
Date: Wed, 22 May 2024 10:48:13 -0300 [thread overview]
Message-ID: <20240522134813.GD69273@ziepe.ca> (raw)
In-Reply-To: <72da2e56f6e71be4f485245688c8b935d9c3fa18.camel@linux.ibm.com>
On Tue, May 21, 2024 at 06:40:13PM +0200, Gerd Bayer wrote:
> > > @@ -148,6 +155,15 @@ ssize_t vfio_pci_core_do_io_rw(struct
> > > vfio_pci_core_device *vdev, bool test_mem,
> > > else
> > > fillable = 0;
> > >
> > > +#if defined(ioread64) && defined(iowrite64)
> >
> > Can we check for #ifdef CONFIG_64BIT instead? In x86, ioread64 and
> > iowrite64 get declared as extern functions if CONFIG_GENERIC_IOMAP is
> > defined and this check always fails. In include/asm-generic/io.h,
> > asm-generic/iomap.h gets included which declares them as extern
> > functions.
>
> I thinks that should be possible - since ioread64/iowrite64 depend on
> CONFIG_64BIT themselves.
>
> > One more thing to consider io-64-nonatomic-hi-lo.h and
> > io-64-nonatomic-lo-hi.h, if included would define it as a macro that
> > calls a function that rw 32 bits back to back.
This might be a better way to go than trying to have vfio provide its
own emulation.
> Even today, vfio_pci_core_do_io_rw() makes no guarantees to its users
> that register accesses will be done in the granularity they've thought
> to use. The vfs layer may coalesce the accesses and this code will then
> read/write the largest naturally aligned chunks. I've witnessed in my
> testing that one device driver was doing 8-byte writes through the 8-
> byte capable vfio layer all of a sudden when run in a KVM guest.
Sure, KVM has emulation for various byte sizes, and does invoke vfio
with the raw size it got from guest, including larger than 8 sizes
from things like SSE instructions. This has nothing to do with the VFS
layer.
> So higher-level code needs to consider how to split register accesses
> appropriately to get the intended side-effects. Thus, I'd rather stay
> away from splitting 64bit accesses into two 32bit accesses - and decide
> if high or low order values should be written first.
The VFIO API is a byte for byte memcpy. VFIO should try to do the
largest single instruction accesses it knows how to do because some HW
is sensitive to that. Otherwise it does a memcpy loop.
Jason
next prev parent reply other threads:[~2024-05-22 13:48 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-25 16:56 [PATCH v3 0/3] vfio/pci: Support 8-byte PCI loads and stores Gerd Bayer
2024-04-25 16:56 ` [PATCH v3 1/3] vfio/pci: Extract duplicated code into macro Gerd Bayer
2024-04-29 16:31 ` Alex Williamson
2024-05-17 14:22 ` Gerd Bayer
2024-04-29 20:09 ` Jason Gunthorpe
2024-04-29 22:11 ` Alex Williamson
2024-04-29 22:33 ` Jason Gunthorpe
2024-05-21 15:47 ` Gerd Bayer
2024-04-30 8:16 ` liulongfang
2024-05-17 10:47 ` Ramesh Thomas
2024-04-25 16:56 ` [PATCH v3 2/3] vfio/pci: Support 8-byte PCI loads and stores Gerd Bayer
2024-04-29 16:31 ` Alex Williamson
2024-05-21 15:50 ` Gerd Bayer
2024-05-17 10:29 ` Ramesh Thomas
2024-05-20 9:02 ` Tian, Kevin
2024-05-23 0:11 ` Ramesh Thomas
2024-05-23 21:52 ` Ramesh Thomas
2024-05-21 16:40 ` Gerd Bayer
2024-05-22 13:48 ` Jason Gunthorpe [this message]
2024-05-22 23:57 ` Ramesh Thomas
2024-04-25 16:56 ` [PATCH v3 3/3] vfio/pci: Continue to refactor vfio_pci_core_do_io_rw Gerd Bayer
2024-04-28 6:59 ` Tian, Kevin
2024-04-29 16:32 ` Alex Williamson
2024-05-21 16:43 ` Gerd Bayer
2024-05-17 11:41 ` Ramesh Thomas
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