From: James Raphael Tiovalen <jamestiotio@gmail.com>
To: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org
Cc: andrew.jones@linux.dev, atishp@rivosinc.com,
cade.richard@berkeley.edu,
James Raphael Tiovalen <jamestiotio@gmail.com>
Subject: [kvm-unit-tests PATCH 0/4] riscv: sbi: Add support to test timer extension
Date: Wed, 19 Jun 2024 01:30:49 +0800 [thread overview]
Message-ID: <20240618173053.364776-1-jamestiotio@gmail.com> (raw)
This patch series adds support for testing the timer extension as
defined in the RISC-V SBI specification. The first 3 patches add
infrastructural support for handling interrupts, while the last patch
adds the actual test for the timer extension.
James Raphael Tiovalen (4):
riscv: Extend exception handling support for interrupts
riscv: Update exception cause list
riscv: Add methods to toggle interrupt enable bits
riscv: sbi: Add test for timer extension
riscv/Makefile | 1 +
lib/riscv/asm/csr.h | 30 +++++++++++---
lib/riscv/asm/interrupt.h | 12 ++++++
lib/riscv/asm/processor.h | 15 ++++++-
lib/riscv/asm/sbi.h | 5 +++
lib/riscv/interrupt.c | 39 ++++++++++++++++++
lib/riscv/processor.c | 27 ++++++++++--
riscv/sbi.c | 87 +++++++++++++++++++++++++++++++++++++++
8 files changed, 205 insertions(+), 11 deletions(-)
create mode 100644 lib/riscv/asm/interrupt.h
create mode 100644 lib/riscv/interrupt.c
--
2.43.0
next reply other threads:[~2024-06-18 17:32 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-18 17:30 James Raphael Tiovalen [this message]
2024-06-18 17:30 ` [kvm-unit-tests PATCH 1/4] riscv: Extend exception handling support for interrupts James Raphael Tiovalen
2024-06-18 17:30 ` [kvm-unit-tests PATCH 2/4] riscv: Update exception cause list James Raphael Tiovalen
2024-06-19 8:30 ` Andrew Jones
2024-06-19 13:35 ` James R T
2024-06-18 17:30 ` [kvm-unit-tests PATCH 3/4] riscv: Add methods to toggle interrupt enable bits James Raphael Tiovalen
2024-06-19 8:39 ` Andrew Jones
2024-06-19 13:40 ` James R T
2024-06-18 17:30 ` [kvm-unit-tests PATCH 4/4] riscv: sbi: Add test for timer extension James Raphael Tiovalen
2024-07-04 16:06 ` Andrew Jones
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