From: Gerd Bayer <gbayer@linux.ibm.com>
To: Alex Williamson <alex.williamson@redhat.com>,
Jason Gunthorpe <jgg@ziepe.ca>,
Niklas Schnelle <schnelle@linux.ibm.com>,
Ramesh Thomas <ramesh.thomas@intel.com>
Cc: kvm@vger.kernel.org, linux-s390@vger.kernel.org,
Ankit Agrawal <ankita@nvidia.com>,
Yishai Hadas <yishaih@nvidia.com>,
Halil Pasic <pasic@linux.ibm.com>, Ben Segal <bpsegal@us.ibm.com>,
"Tian, Kevin" <kevin.tian@intel.com>,
Julian Ruess <julianr@linux.ibm.com>,
Gerd Bayer <gbayer@linux.ibm.com>
Subject: [PATCH v6 0/3] vfio/pci: Support 8-byte PCI loads and stores
Date: Wed, 19 Jun 2024 13:58:44 +0200 [thread overview]
Message-ID: <20240619115847.1344875-1-gbayer@linux.ibm.com> (raw)
Hi all,
this all started with a single patch by Ben to enable writing a user-mode
driver for a PCI device that requires 64bit register read/writes on s390.
A quick grep showed that there are several other drivers for PCI devices
in the kernel that use readq/writeq and eventually could use this, too.
So we decided to propose this for general inclusion.
A couple of suggestions for refactorizations by Jason Gunthorpe and Alex
Williamson later [1], I arrived at this little series that avoids some
code duplication in vfio_pci_core_do_io_rw().
Also, I've added a small patch to correct the spelling in one of the
declaration macros that was suggested by Ramesh Thomas [2]. However,
after some discussions about making 8-byte accesses available for x86,
Ramesh and I decided to do this in a separate patch [3].
This version was tested with a pass-through PCI device in a KVM guest
and with explicit test reads of size 8, 16, 32, and 64 bit on s390.
For 32bit architectures this has only been compile tested for the
32bit ARM architecture.
Thank you,
Gerd Bayer
[1] https://lore.kernel.org/all/20240422153508.2355844-1-gbayer@linux.ibm.com/
[2] https://lore.kernel.org/kvm/20240425165604.899447-1-gbayer@linux.ibm.com/T/#m1b51fe155c60d04313695fbee11a2ccea856a98c
[3] https://lore.kernel.org/all/20240522232125.548643-1-ramesh.thomas@intel.com/
Changes v5 -> v6:
- restrict patch 3/3 to just the typo fix - no move of semicolons
Changes v4 -> v5:
- Make 8-byte accessors depend on the definitions of ioread64 and
iowrite64, again. Ramesh agreed to sort these out for x86 separately.
Changes v3 -> v4:
- Make 64-bit accessors depend on CONFIG_64BIT (for x86, too).
- Drop conversion of if-else if chain to switch-case.
- Add patch to fix spelling of declaration macro.
Changes v2 -> v3:
- Introduce macro to generate body of different-size accesses in
vfio_pci_core_do_io_rw (courtesy Alex Williamson).
- Convert if-else if chain to a switch-case construct to better
accommodate conditional compiles.
Changes v1 -> v2:
- On non 64bit architecture use at most 32bit accesses in
vfio_pci_core_do_io_rw and describe that in the commit message.
- Drop the run-time error on 32bit architectures.
- The #endif splitting the "else if" is not really fortunate, but I'm
open to suggestions.
Ben Segal (1):
vfio/pci: Support 8-byte PCI loads and stores
Gerd Bayer (2):
vfio/pci: Extract duplicated code into macro
vfio/pci: Fix typo in macro to declare accessors
drivers/vfio/pci/vfio_pci_rdwr.c | 122 ++++++++++++++++---------------
include/linux/vfio_pci_core.h | 21 +++---
2 files changed, 74 insertions(+), 69 deletions(-)
--
2.45.2
next reply other threads:[~2024-06-19 11:59 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-19 11:58 Gerd Bayer [this message]
2024-06-19 11:58 ` [PATCH v6 1/3] vfio/pci: Extract duplicated code into macro Gerd Bayer
2024-06-19 11:58 ` [PATCH v6 2/3] vfio/pci: Support 8-byte PCI loads and stores Gerd Bayer
2024-06-19 11:58 ` [PATCH v6 3/3] vfio/pci: Fix typo in macro to declare accessors Gerd Bayer
2024-06-21 20:17 ` [PATCH v6 0/3] vfio/pci: Support 8-byte PCI loads and stores Alex Williamson
2024-06-21 21:50 ` Ramesh Thomas
2024-12-03 18:01 ` Ramesh Thomas
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