From: Marc Zyngier <maz@kernel.org>
To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
kvm@vger.kernel.org
Cc: James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Oliver Upton <oliver.upton@linux.dev>,
Zenghui Yu <yuzenghui@huawei.com>
Subject: [PATCH 05/11] KVM: arm64: Handle trapping of FEAT_LS64* instructions
Date: Thu, 15 Aug 2024 13:59:53 +0100 [thread overview]
Message-ID: <20240815125959.2097734-6-maz@kernel.org> (raw)
In-Reply-To: <20240815125959.2097734-1-maz@kernel.org>
We generally don't expect FEAT_LS64* instructions to trap, unless
they are trapped by a guest hypervisor.
Otherwise, this is just the guest playing tricks on us by using
an instruction that isn't advertised, which we handle with a well
deserved UNDEF.
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/kvm/handle_exit.c | 64 ++++++++++++++++++++++++++++++++++++
1 file changed, 64 insertions(+)
diff --git a/arch/arm64/kvm/handle_exit.c b/arch/arm64/kvm/handle_exit.c
index d7c2990e7c9e..8cb0091f8e1e 100644
--- a/arch/arm64/kvm/handle_exit.c
+++ b/arch/arm64/kvm/handle_exit.c
@@ -291,6 +291,69 @@ static int handle_svc(struct kvm_vcpu *vcpu)
return 1;
}
+static int handle_ls64b(struct kvm_vcpu *vcpu)
+{
+ struct kvm *kvm = vcpu->kvm;
+ u64 esr = kvm_vcpu_get_esr(vcpu);
+ u64 iss = ESR_ELx_ISS(esr);
+ bool allowed;
+
+ switch (iss) {
+ case ESR_ELx_ISS_ST64BV:
+ allowed = kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64_V);
+ break;
+ case ESR_ELx_ISS_ST64BV0:
+ allowed = kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64_ACCDATA);
+ break;
+ case ESR_ELx_ISS_LDST64B:
+ allowed = kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64);
+ break;
+ default:
+ /* Clearly, we're missing something. */
+ goto unknown_trap;
+ }
+
+ if (!allowed)
+ goto undef;
+
+ if (vcpu_has_nv(vcpu) && !is_hyp_ctxt(vcpu)) {
+ u64 hcrx = __vcpu_sys_reg(vcpu, HCRX_EL2);
+ bool fwd;
+
+ switch (iss) {
+ case ESR_ELx_ISS_ST64BV:
+ fwd = !(hcrx & HCRX_EL2_EnASR);
+ break;
+ case ESR_ELx_ISS_ST64BV0:
+ fwd = !(hcrx & HCRX_EL2_EnAS0);
+ break;
+ case ESR_ELx_ISS_LDST64B:
+ fwd = !(hcrx & HCRX_EL2_EnALS);
+ break;
+ default:
+ /* We don't expect to be here */
+ fwd = false;
+ }
+
+ if (fwd) {
+ kvm_inject_nested_sync(vcpu, esr);
+ return 1;
+ }
+ }
+
+unknown_trap:
+ /*
+ * If we land here, something must be very wrong, because we
+ * have no idea why we trapped at all. Warn and undef as a
+ * fallback.
+ */
+ WARN_ON(1);
+
+undef:
+ kvm_inject_undefined(vcpu);
+ return 1;
+}
+
static exit_handle_fn arm_exit_handlers[] = {
[0 ... ESR_ELx_EC_MAX] = kvm_handle_unknown_ec,
[ESR_ELx_EC_WFx] = kvm_handle_wfx,
@@ -300,6 +363,7 @@ static exit_handle_fn arm_exit_handlers[] = {
[ESR_ELx_EC_CP14_LS] = kvm_handle_cp14_load_store,
[ESR_ELx_EC_CP10_ID] = kvm_handle_cp10_id,
[ESR_ELx_EC_CP14_64] = kvm_handle_cp14_64,
+ [ESR_ELx_EC_LS64B] = handle_ls64b,
[ESR_ELx_EC_HVC32] = handle_hvc,
[ESR_ELx_EC_SMC32] = handle_smc,
[ESR_ELx_EC_HVC64] = handle_hvc,
--
2.39.2
next prev parent reply other threads:[~2024-08-15 13:00 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-15 12:59 [PATCH 00/11] KVM: arm64: Add support for FEAT_LS64 and co Marc Zyngier
2024-08-15 12:59 ` [PATCH 01/11] arm64: Expose ID_AA64ISAR1_EL1.XS to sanitised feature consumers Marc Zyngier
2024-08-15 12:59 ` [PATCH 02/11] arm64: Add syndrome information for trapped LD64B/ST64B{,V,V0} Marc Zyngier
2024-08-15 12:59 ` [PATCH 03/11] KVM: arm64: Add ACCDATA_EL1 to the sysreg array Marc Zyngier
2024-08-15 12:59 ` [PATCH 04/11] KVM: arm64: Add context-switch of ACCDATA_EL1 Marc Zyngier
2024-08-15 12:59 ` Marc Zyngier [this message]
2024-08-15 12:59 ` [PATCH 06/11] KVM: arm64: Add exit to userspace on {LD,ST}64B* outside of memslots Marc Zyngier
2024-08-15 12:59 ` [PATCH 07/11] KVM: arm64: Restrict ACCDATA_EL1 undef to FEAT_ST64_ACCDATA being disabled Marc Zyngier
2024-08-15 12:59 ` [PATCH 08/11] KVM: arm64: Conditionnaly enable FEAT_LS64* instructions Marc Zyngier
2024-08-15 12:59 ` [PATCH 09/11] KVM: arm64: nv: Expose FEAT_LS64* to a nested guest Marc Zyngier
2024-08-15 12:59 ` [PATCH 10/11] arm64: Expose ID_AA64ISAR1_EL1.LS64 to sanitised feature consumers Marc Zyngier
2024-08-15 12:59 ` [PATCH 11/11] KVM: arm64: Add documentation for KVM_EXIT_ARM_LDST64B Marc Zyngier
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240815125959.2097734-6-maz@kernel.org \
--to=maz@kernel.org \
--cc=james.morse@arm.com \
--cc=kvm@vger.kernel.org \
--cc=kvmarm@lists.linux.dev \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=oliver.upton@linux.dev \
--cc=suzuki.poulose@arm.com \
--cc=yuzenghui@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox