public inbox for kvm@vger.kernel.org
 help / color / mirror / Atom feed
From: Marc Zyngier <maz@kernel.org>
To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
	kvm@vger.kernel.org
Cc: James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Oliver Upton <oliver.upton@linux.dev>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Alexander Potapenko <glider@google.com>
Subject: [PATCH v2 05/11] KVM: arm64: Zero ID_AA64PFR0_EL1.GIC when no GICv3 is presented to the guest
Date: Tue, 27 Aug 2024 16:25:11 +0100	[thread overview]
Message-ID: <20240827152517.3909653-6-maz@kernel.org> (raw)
In-Reply-To: <20240827152517.3909653-1-maz@kernel.org>

In order to be consistent, we shouldn't advertise a GICv3 when none
is actually usable by the guest.

Wipe the feature when these conditions apply, and allow the field
to be written from userspace.

This now allows us to rewrite the kvm_has_gicv3 helper() in terms
of kvm_has_feat(), given that it is always evaluated at runtime.

Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 arch/arm64/kvm/sys_regs.c  | 8 +++++++-
 arch/arm64/kvm/vgic/vgic.h | 4 +---
 2 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index bc2d54da3827..e9d8e916e3af 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -2365,7 +2365,6 @@ static const struct sys_reg_desc sys_reg_descs[] = {
 		   ID_AA64PFR0_EL1_MPAM |
 		   ID_AA64PFR0_EL1_SVE |
 		   ID_AA64PFR0_EL1_RAS |
-		   ID_AA64PFR0_EL1_GIC |
 		   ID_AA64PFR0_EL1_AdvSIMD |
 		   ID_AA64PFR0_EL1_FP), },
 	ID_SANITISED(ID_AA64PFR1_EL1),
@@ -4634,6 +4633,13 @@ int kvm_finalize_sys_regs(struct kvm_vcpu *vcpu)
 
 	guard(mutex)(&kvm->arch.config_lock);
 
+	if (!(static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif) &&
+	      irqchip_in_kernel(kvm) &&
+	      kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3)) {
+		kvm->arch.id_regs[IDREG_IDX(SYS_ID_AA64PFR0_EL1)] &= ~ID_AA64PFR0_EL1_GIC_MASK;
+		kvm->arch.id_regs[IDREG_IDX(SYS_ID_PFR1_EL1)] &= ~ID_PFR1_EL1_GIC_MASK;
+	}
+
 	if (vcpu_has_nv(vcpu)) {
 		int ret = kvm_init_nv_sysregs(kvm);
 		if (ret)
diff --git a/arch/arm64/kvm/vgic/vgic.h b/arch/arm64/kvm/vgic/vgic.h
index c72c38b44234..f2486b4d9f95 100644
--- a/arch/arm64/kvm/vgic/vgic.h
+++ b/arch/arm64/kvm/vgic/vgic.h
@@ -350,9 +350,7 @@ void vcpu_set_ich_hcr(struct kvm_vcpu *vcpu);
 
 static inline bool kvm_has_gicv3(struct kvm *kvm)
 {
-	return (static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif) &&
-		irqchip_in_kernel(kvm) &&
-		kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3);
+	return kvm_has_feat(kvm, ID_AA64PFR0_EL1, GIC, IMP);
 }
 
 #endif
-- 
2.39.2


  parent reply	other threads:[~2024-08-27 15:25 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-27 15:25 [PATCH v2 00/11] KVM: arm64: Handle the lack of GICv3 exposed to a guest Marc Zyngier
2024-08-27 15:25 ` [PATCH v2 01/11] KVM: arm64: Move GICv3 trap configuration to kvm_calculate_traps() Marc Zyngier
2024-08-27 15:25 ` [PATCH v2 02/11] KVM: arm64: Force SRE traps when SRE access is not enabled Marc Zyngier
2024-08-27 15:25 ` [PATCH v2 03/11] KVM: arm64: Force GICv3 trap activation when no irqchip is configured on VHE Marc Zyngier
2024-08-27 15:25 ` [PATCH v2 04/11] KVM: arm64: Add helper for last ditch idreg adjustments Marc Zyngier
2024-08-27 15:25 ` Marc Zyngier [this message]
2024-08-28 23:22   ` [PATCH v2 05/11] KVM: arm64: Zero ID_AA64PFR0_EL1.GIC when no GICv3 is presented to the guest Mark Brown
2024-08-29  0:48     ` Oliver Upton
2024-08-27 15:25 ` [PATCH v2 06/11] KVM: arm64: Add ICH_HCR_EL2 to the vcpu state Marc Zyngier
2024-08-27 15:25 ` [PATCH v2 07/11] KVM: arm64: Add trap routing information for ICH_HCR_EL2 Marc Zyngier
2024-08-27 15:25 ` [PATCH v2 08/11] KVM: arm64: Honor guest requested traps in GICv3 emulation Marc Zyngier
2024-08-27 15:25 ` [PATCH v2 09/11] KVM: arm64: Make most GICv3 accesses UNDEF if they trap Marc Zyngier
2024-08-27 15:25 ` [PATCH v2 10/11] KVM: arm64: Unify UNDEF injection helpers Marc Zyngier
2024-08-27 15:25 ` [PATCH v2 11/11] KVM: arm64: Add selftest checking how the absence of GICv3 is handled Marc Zyngier
2024-08-27 17:01 ` [PATCH v2 00/11] KVM: arm64: Handle the lack of GICv3 exposed to a guest Oliver Upton
2024-08-27 17:41 ` Marc Zyngier

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20240827152517.3909653-6-maz@kernel.org \
    --to=maz@kernel.org \
    --cc=glider@google.com \
    --cc=james.morse@arm.com \
    --cc=kvm@vger.kernel.org \
    --cc=kvmarm@lists.linux.dev \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=oliver.upton@linux.dev \
    --cc=suzuki.poulose@arm.com \
    --cc=yuzenghui@huawei.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox