From: Jim Mattson <jmattson@google.com>
To: kvm@vger.kernel.org
Cc: bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com,
jpoimboe@kernel.org, kai.huang@intel.com,
linux-kernel@vger.kernel.org, mingo@redhat.com,
pawan.kumar.gupta@linux.intel.com, pbonzini@redhat.com,
sandipan.das@amd.com, seanjc@google.com, tglx@linutronix.de,
x86@kernel.org, Jim Mattson <jmattson@google.com>
Subject: [PATCH v5 1/4] x86/cpufeatures: Clarify semantics of X86_FEATURE_IBPB
Date: Fri, 11 Oct 2024 14:43:50 -0700 [thread overview]
Message-ID: <20241011214353.1625057-2-jmattson@google.com> (raw)
In-Reply-To: <20241011214353.1625057-1-jmattson@google.com>
Since this synthetic feature bit is set on AMD CPUs that don't flush
the RSB on an IBPB, indicate as much in the comment, to avoid
potential confusion with the Intel IBPB semantics.
Signed-off-by: Jim Mattson <jmattson@google.com>
---
arch/x86/include/asm/cpufeatures.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index dd4682857c12..644b3e1e1ab6 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -215,7 +215,7 @@
#define X86_FEATURE_SPEC_STORE_BYPASS_DISABLE ( 7*32+23) /* Disable Speculative Store Bypass. */
#define X86_FEATURE_LS_CFG_SSBD ( 7*32+24) /* AMD SSBD implementation via LS_CFG MSR */
#define X86_FEATURE_IBRS ( 7*32+25) /* "ibrs" Indirect Branch Restricted Speculation */
-#define X86_FEATURE_IBPB ( 7*32+26) /* "ibpb" Indirect Branch Prediction Barrier */
+#define X86_FEATURE_IBPB ( 7*32+26) /* "ibpb" Indirect Branch Prediction Barrier without a guaranteed RSB flush */
#define X86_FEATURE_STIBP ( 7*32+27) /* "stibp" Single Thread Indirect Branch Predictors */
#define X86_FEATURE_ZEN ( 7*32+28) /* Generic flag for all Zen and newer */
#define X86_FEATURE_L1TF_PTEINV ( 7*32+29) /* L1TF workaround PTE inversion */
--
2.47.0.rc1.288.g06298d1525-goog
next prev parent reply other threads:[~2024-10-11 21:44 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-11 21:43 [PATCH v5 0/4] Distinguish between variants of IBPB Jim Mattson
2024-10-11 21:43 ` Jim Mattson [this message]
2024-10-11 21:43 ` [PATCH v5 2/4] x86/cpufeatures: Define X86_FEATURE_AMD_IBPB_RET Jim Mattson
2024-10-11 21:43 ` [PATCH v5 3/4] KVM: x86: Advertise AMD_IBPB_RET to userspace Jim Mattson
2024-10-11 21:43 ` [PATCH v5 4/4] KVM: x86: AMD's IBPB is not equivalent to Intel's IBPB Jim Mattson
2024-10-14 15:48 ` Tom Lendacky
2024-10-31 19:51 ` [PATCH v5 0/4] Distinguish between variants of IBPB Sean Christopherson
2024-11-01 15:40 ` Borislav Petkov
2024-11-01 16:03 ` Sean Christopherson
2024-11-01 19:28 ` Sean Christopherson
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