From: "Clément Léger" <cleger@rivosinc.com>
To: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org
Cc: "Clément Léger" <cleger@rivosinc.com>,
"Andrew Jones" <ajones@ventanamicro.com>,
"Anup Patel" <apatel@ventanamicro.com>,
"Atish Patra" <atishp@rivosinc.com>
Subject: [kvm-unit-tests PATCH v2 0/3] riscv: add SBI SSE extension tests
Date: Fri, 22 Nov 2024 15:04:54 +0100 [thread overview]
Message-ID: <20241122140459.566306-1-cleger@rivosinc.com> (raw)
This series adds an individual test for SBI SSE extension as well as
needed infrastructure for SSE support.
---
V2:
- Rebased on origin/master and integrate it into sbi.c tests
Clément Léger (3):
riscv: lib: Add SBI SSE extension definitions
riscv: lib: Add SSE assembly entry handling
riscv: sbi: Add SSE extension tests
riscv/Makefile | 2 +
lib/riscv/asm/csr.h | 2 +
lib/riscv/asm/sbi.h | 76 ++++
lib/riscv/asm/sse.h | 16 +
lib/riscv/sse-entry.S | 100 ++++
lib/riscv/asm-offsets.c | 9 +
riscv/sbi-tests.h | 4 +
riscv/sbi-sse.c | 981 ++++++++++++++++++++++++++++++++++++++++
riscv/sbi.c | 1 +
riscv/unittests.cfg | 4 +
10 files changed, 1195 insertions(+)
create mode 100644 lib/riscv/asm/sse.h
create mode 100644 lib/riscv/sse-entry.S
create mode 100644 riscv/sbi-sse.c
--
2.45.2
next reply other threads:[~2024-11-22 14:05 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-22 14:04 Clément Léger [this message]
2024-11-22 14:04 ` [kvm-unit-tests PATCH v2 1/3] riscv: lib: Add SBI SSE extension definitions Clément Léger
2024-11-22 16:05 ` Andrew Jones
2024-11-22 14:04 ` [kvm-unit-tests PATCH v2 2/3] riscv: lib: Add SSE assembly entry handling Clément Léger
2024-11-22 16:20 ` Andrew Jones
2024-11-25 8:46 ` Clément Léger
2024-11-25 9:38 ` Andrew Jones
2024-11-25 10:29 ` Clément Léger
2024-11-22 14:04 ` [kvm-unit-tests PATCH v2 3/3] riscv: sbi: Add SSE extension tests Clément Léger
2024-11-22 16:34 ` Andrew Jones
2024-11-25 8:55 ` Clément Léger
2024-11-25 9:40 ` Andrew Jones
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