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From: Andrew Jones <andrew.jones@linux.dev>
To: "Clément Léger" <cleger@rivosinc.com>
Cc: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
	 Andrew Jones <ajones@ventanamicro.com>,
	Anup Patel <apatel@ventanamicro.com>,
	 Atish Patra <atishp@rivosinc.com>
Subject: Re: [kvm-unit-tests PATCH v3 4/4] riscv: sbi: Add SSE extension tests
Date: Mon, 25 Nov 2024 14:53:46 +0100	[thread overview]
Message-ID: <20241125-01fae59d27bb81fff71e794e@orel> (raw)
In-Reply-To: <20241125115452.1255745-5-cleger@rivosinc.com>

On Mon, Nov 25, 2024 at 12:54:48PM +0100, Clément Léger wrote:
> Add SBI SSE extension tests for the following features:
> - Test attributes errors (invalid values, RO, etc)
> - Registration errors
> - Simple events (register, enable, inject)
> - Events with different priorities
> - Global events dispatch on different harts
> - Local events on all harts

And now also double trap and mask/unmask.

Thanks,
drew

  reply	other threads:[~2024-11-25 13:53 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-25 11:54 [kvm-unit-tests PATCH v3 0/4] riscv: add SBI SSE extension tests Clément Léger
2024-11-25 11:54 ` [kvm-unit-tests PATCH v3 1/4] riscv: Add "-deps" handling for tests Clément Léger
2024-11-25 12:52   ` Andrew Jones
2024-11-25 11:54 ` [kvm-unit-tests PATCH v3 2/4] riscv: lib: Add SBI SSE extension definitions Clément Léger
2024-11-25 12:55   ` Andrew Jones
2024-11-25 11:54 ` [kvm-unit-tests PATCH v3 3/4] riscv: lib: Add SSE assembly entry handling Clément Léger
2024-11-25 13:50   ` Andrew Jones
2024-11-25 14:13     ` Clément Léger
2024-11-25 14:26       ` Andrew Jones
2024-11-25 14:41         ` Clément Léger
2024-11-25 11:54 ` [kvm-unit-tests PATCH v3 4/4] riscv: sbi: Add SSE extension tests Clément Léger
2024-11-25 13:53   ` Andrew Jones [this message]
2024-11-25 14:09     ` Clément Léger

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