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Wed, 27 Nov 2024 09:22:46 -0800 (PST) X-Google-Smtp-Source: AGHT+IFgahiLZdXLot24IB4E3W1bQXNAY3TqwQBGglHBYwgd/Sn9n6D44soFsrc5jyVRxyY14SiM6Q== X-Received: by 2002:a05:6e02:1785:b0:3a7:bd4c:b17e with SMTP id e9e14a558f8ab-3a7c544a689mr11641795ab.0.1732728165925; Wed, 27 Nov 2024 09:22:45 -0800 (PST) Received: from redhat.com ([38.15.36.11]) by smtp.gmail.com with ESMTPSA id e9e14a558f8ab-3a79acbdf6asm27282405ab.77.2024.11.27.09.22.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Nov 2024 09:22:45 -0800 (PST) Date: Wed, 27 Nov 2024 10:22:43 -0700 From: Alex Williamson To: Mitchell Augustin Cc: linux-pci@vger.kernel.org, kvm@vger.kernel.org, Bjorn Helgaas , linux-kernel@vger.kernel.org Subject: Re: drivers/pci: (and/or KVM): Slow PCI initialization during VM boot with passthrough of large BAR Nvidia GPUs on DGX H100 Message-ID: <20241127102243.57cddb78.alex.williamson@redhat.com> In-Reply-To: References: <20241126103427.42d21193.alex.williamson@redhat.com> <20241126154145.638dba46.alex.williamson@redhat.com> <20241126170214.5717003f.alex.williamson@redhat.com> X-Mailer: Claws Mail 4.3.0 (GTK 3.24.43; x86_64-redhat-linux-gnu) Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Tue, 26 Nov 2024 19:12:35 -0600 Mitchell Augustin wrote: > Thanks for the breakdown! > > > That alone calls __pci_read_base() three separate times, each time > > disabling and re-enabling decode on the bridge. [...] So we're > > really being bitten that we toggle decode-enable/memory enable > > around reading each BAR size > > That makes sense to me. Is this something that could theoretically be > done in a less redundant way, or is there some functional limitation > that would prevent that or make it inadvisable? (I'm still new to pci > subsystem debugging, so apologies if that's a bit vague.) The only requirement is that decode should be disabled while sizing BARs, the fact that we repeat it around each BAR is, I think, just the way the code is structured. It doesn't take into account that toggling the command register bit is not a trivial operation in a virtualized environment. IMO we should push the command register manipulation up a layer so that we only toggle it once per device rather than once per BAR. Thanks, Alex