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[2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434b0f7dd78sm14832355e9.44.2024.11.28.00.52.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Nov 2024 00:52:07 -0800 (PST) Date: Thu, 28 Nov 2024 09:52:06 +0100 From: Andrew Jones To: zhouquan@iscas.ac.cn Cc: anup@brainfault.org, atishp@atishpatra.org, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org Subject: Re: [PATCH 2/4] RISC-V: KVM: Allow Zabha extension for Guest/VM Message-ID: <20241128-4d652d29ba99a3e8ffa8121a@orel> References: Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Thu, Nov 28, 2024 at 11:21:26AM +0800, zhouquan@iscas.ac.cn wrote: > From: Quan Zhou > > Extend the KVM ISA extension ONE_REG interface to allow KVM user space > to detect and enable Zabha extension for Guest/VM. > > Signed-off-by: Quan Zhou > --- > arch/riscv/include/uapi/asm/kvm.h | 1 + > arch/riscv/kvm/vcpu_onereg.c | 2 ++ > 2 files changed, 3 insertions(+) > > diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h > index 9db33f52f56e..340618131249 100644 > --- a/arch/riscv/include/uapi/asm/kvm.h > +++ b/arch/riscv/include/uapi/asm/kvm.h > @@ -178,6 +178,7 @@ enum KVM_RISCV_ISA_EXT_ID { > KVM_RISCV_ISA_EXT_SMNPM, > KVM_RISCV_ISA_EXT_SSNPM, > KVM_RISCV_ISA_EXT_SVVPTC, > + KVM_RISCV_ISA_EXT_ZABHA, > KVM_RISCV_ISA_EXT_MAX, > }; > > diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c > index 67965feb5b74..9a30a98f30bc 100644 > --- a/arch/riscv/kvm/vcpu_onereg.c > +++ b/arch/riscv/kvm/vcpu_onereg.c > @@ -44,6 +44,7 @@ static const unsigned long kvm_isa_ext_arr[] = { > KVM_ISA_EXT_ARR(SVVPTC), > KVM_ISA_EXT_ARR(SVNAPOT), > KVM_ISA_EXT_ARR(SVPBMT), > + KVM_ISA_EXT_ARR(ZABHA), > KVM_ISA_EXT_ARR(ZACAS), > KVM_ISA_EXT_ARR(ZAWRS), > KVM_ISA_EXT_ARR(ZBA), > @@ -138,6 +139,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext) > case KVM_RISCV_ISA_EXT_SVINVAL: > case KVM_RISCV_ISA_EXT_SVVPTC: > case KVM_RISCV_ISA_EXT_SVNAPOT: > + case KVM_RISCV_ISA_EXT_ZABHA: > case KVM_RISCV_ISA_EXT_ZACAS: > case KVM_RISCV_ISA_EXT_ZAWRS: > case KVM_RISCV_ISA_EXT_ZBA: > -- > 2.34.1 > Reviewed-by: Andrew Jones