Re: [PATCH 00/11] KVM: arm64: Add NV timer support

Marc Zyngier
2024-12-09T15:15:59Z

Hi Chase,

On Mon, 09 Dec 2024 14:24:29 +0000,
Chase Conklin <chase.conklin@arm.com> wrote:
>
> Hi Marc,
>
> On Mon, 2 Dec 2024 17:21:23 +0000, Marc Zyngier <maz@kernel.org>
> wrote:
>
> > If you are feeling brave, you can run the whole thing from [1].
> >
> > [1] https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=kvm-arm64/nv-next
> >
>
> I was feeling brave, and I think I see an issue in the cpufeature change
> in the kvm-arm64/nv-e2h-select branch that's a part of
> kvm-arm64/nv-next. In d75a4820a897 ("arm64: cpufeature: Handle NV_frac as a synonym of NV2"),
> I don't see NV_frac being added to the FTR bits. I believe that means it
> will get sanitized out and consequently not seen by the NV feature
> detection code. Does that commit also need:
>
> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> index 9fa8bd77ae0..f97459e160b 100644
> --- a/arch/arm64/kernel/cpufeature.c
> +++ b/arch/arm64/kernel/cpufeature.c
> @@ -480,6 +480,7 @@ static const struct arm64_ftr_bits ftr_id_aa64mmfr3[] = {
>
> static const struct arm64_ftr_bits ftr_id_aa64mmfr4[] = {
> S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR4_EL1_E2H0_SHIFT, 4, 0),
> + S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR4_EL1_NV_frac_SHIFT, 4, 0),
> ARM64_FTR_END,
> };

Ah, I always get tripped by that one. You are absolutely correct, this
is needed. I'll fold that in.

Thanks again,

M.

--
Without deviation from the norm, progress is not possible.