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From: Alex Williamson <alex.williamson@redhat.com>
To: Mitchell Augustin <mitchell.augustin@canonical.com>
Cc: linux-pci@vger.kernel.org, kvm@vger.kernel.org,
	Bjorn Helgaas <bhelgaas@google.com>,
	linux-kernel@vger.kernel.org
Subject: Re: drivers/pci: (and/or KVM): Slow PCI initialization during VM boot with passthrough of large BAR Nvidia GPUs on DGX H100
Date: Tue, 3 Dec 2024 16:30:45 -0700	[thread overview]
Message-ID: <20241203163045.3e068562.alex.williamson@redhat.com> (raw)
In-Reply-To: <CAHTA-uZD5_TAZQkxdJRt48T=aPNAKg+x1tgpadv8aDbX5f14vA@mail.gmail.com>

On Tue, 3 Dec 2024 17:09:07 -0600
Mitchell Augustin <mitchell.augustin@canonical.com> wrote:

> Thanks for the suggestions!
> 
> > The calling convention of __pci_read_base() is already changing if we're having the caller disable decoding  
> 
> The way I implemented that in my initial patch draft[0] still allows
> for __pci_read_base() to be called independently, as it was
> originally, since (as far as I understand) the encode disable/enable
> is just a mask - so I didn't need to remove the disable/enable inside
> __pci_read_base(), and instead just added an extra one in
> pci_read_bases(), turning the __pci_read_base() disable/enable into a
> no-op when called from pci_read_bases(). In any case...
> 
> > I think maybe another alternative that doesn't hold off the console would be to split the BAR sizing and resource processing into separate steps.  
> 
> This seems like a potentially better option, so I'll dig into that approach.
> 
> 
> Providing some additional info you requested last week, just for more context:
> 
> > Do you have similar logs from that [hotplug] operation  
> 
> Attached [1] is the guest boot output (boot was quick, since no GPUs
> were attached at boot time)

I think what's happening here is that decode is already disabled on the
hot-added device (vs enabled by the VM firmware on cold-plug), so in
practice it's similar to your nested disable solution.  Thanks,

Alex


  reply	other threads:[~2024-12-03 23:30 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-25 22:46 drivers/pci: (and/or KVM): Slow PCI initialization during VM boot with passthrough of large BAR Nvidia GPUs on DGX H100 Mitchell Augustin
2024-11-26 17:34 ` Alex Williamson
2024-11-26 22:18   ` Mitchell Augustin
2024-11-26 22:41     ` Alex Williamson
2024-11-26 23:08       ` Mitchell Augustin
2024-11-27  0:02         ` Alex Williamson
2024-11-27  1:12           ` Mitchell Augustin
2024-11-27 17:22             ` Alex Williamson
2024-12-02 19:36               ` Mitchell Augustin
2024-12-03 18:34                 ` Mitchell Augustin
2024-12-03 19:20                 ` Alex Williamson
2024-12-03 20:33                   ` Mitchell Augustin
2024-12-03 22:06                     ` Alex Williamson
2024-12-03 23:09                       ` Mitchell Augustin
2024-12-03 23:30                         ` Alex Williamson [this message]
2024-12-06  0:09                           ` Mitchell Augustin
2025-01-08 23:06                             ` Mitchell Augustin
2025-01-13 18:22                               ` Alex Williamson
2025-01-13 19:43                                 ` Mitchell Augustin

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