[PATCH v2 0/2] Extend 8-byte PCI load/store support to x86 arch

[PATCH v2 0/2] Extend 8-byte PCI load/store support to x86 arch

[Ramesh Thomas]

This patch series extends the recently added 8-byte PCI load/store
support to the x86 architecture. 

Refer patch series adding above support:
https://lore.kernel.org/all/20240522150651.1999584-1-gbayer@linux.ibm.com/

The 8-byte implementations are enclosed inside #ifdef checks of the
macros "ioread64" and "iowrite64". These macros don't get defined if
CONFIG_GENERIC_IOMAP is defined. CONFIG_GENERIC_IOMAP gets defined for
x86 and hence the macros are undefined. Due to this the 8-byte support
was not enabled for x86 architecture.

To resolve this, include the header file io-64-nonatomic-lo-hi.h that
maps the ioread64 and iowrite64 macros to a generic implementation in
lib/iomap.c. This was the intention of defining CONFIG_GENERIC_IOMAP.

Tested using a pass-through PCI device bound to vfio-pci driver and
doing BAR reads and writes that trigger calls to
vfio_pci_core_do_io_rw() that does the 8-byte reads and writes.

Patch history:
v2: Based on Jason's feedback moved #include io-64-nonatomic-lo-hi.h
to vfio_pci_rdwr.c and replaced #ifdef checks of iowrite64 and ioread64
macros with checks for CONFIG_64BIT.

https://lore.kernel.org/all/20240522232125.548643-1-ramesh.thomas@intel.com/
https://lore.kernel.org/all/20240524140013.GM69273@ziepe.ca/
https://lore.kernel.org/all/bfb273b2-fc5e-4a8b-a40d-56996fc9e0af@intel.com/

Ramesh Thomas (2):
  vfio/pci: Enable iowrite64 and ioread64 for vfio pci
  vfio/pci: Remove #ifdef iowrite64 and #ifdef ioread64

 drivers/vfio/pci/vfio_pci_rdwr.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

-- 
2.34.1

[PATCH v2 1/2] vfio/pci: Enable iowrite64 and ioread64 for vfio pci

[Ramesh Thomas]

Definitions of ioread64 and iowrite64 macros in asm/io.h called by vfio
pci implementations are enclosed inside check for CONFIG_GENERIC_IOMAP.
They don't get defined if CONFIG_GENERIC_IOMAP is defined. Include
linux/io-64-nonatomic-lo-hi.h to define iowrite64 and ioread64 macros
when they are not defined. io-64-nonatomic-lo-hi.h maps the macros to
generic implementation in lib/iomap.c. The generic implementation does
64 bit rw if readq/writeq is defined for the architecture, otherwise it
would do 32 bit back to back rw.

Note that there are two versions of the generic implementation that
differs in the order the 32 bit words are written if 64 bit support is
not present. This is not the little/big endian ordering, which is
handled separately. This patch uses the lo followed by hi word ordering
which is consistent with current back to back implementation in the
vfio/pci code.

Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
---
 drivers/vfio/pci/vfio_pci_rdwr.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/vfio/pci/vfio_pci_rdwr.c b/drivers/vfio/pci/vfio_pci_rdwr.c
index 66b72c289284..a0595c745732 100644
--- a/drivers/vfio/pci/vfio_pci_rdwr.c
+++ b/drivers/vfio/pci/vfio_pci_rdwr.c
@@ -16,6 +16,7 @@
 #include <linux/io.h>
 #include <linux/vfio.h>
 #include <linux/vgaarb.h>
+#include <linux/io-64-nonatomic-lo-hi.h>
 
 #include "vfio_pci_priv.h"
 
-- 
2.34.1

Re: [PATCH v2 1/2] vfio/pci: Enable iowrite64 and ioread64 for vfio pci

[Niklas Schnelle]

On Tue, 2024-12-03 at 10:41 -0800, Ramesh Thomas wrote:
> Definitions of ioread64 and iowrite64 macros in asm/io.h called by vfio
> pci implementations are enclosed inside check for CONFIG_GENERIC_IOMAP.
> They don't get defined if CONFIG_GENERIC_IOMAP is defined. Include
> linux/io-64-nonatomic-lo-hi.h to define iowrite64 and ioread64 macros
> when they are not defined. io-64-nonatomic-lo-hi.h maps the macros to
> generic implementation in lib/iomap.c. The generic implementation does
> 64 bit rw if readq/writeq is defined for the architecture, otherwise it
> would do 32 bit back to back rw.
> 
> Note that there are two versions of the generic implementation that
> differs in the order the 32 bit words are written if 64 bit support is
> not present. This is not the little/big endian ordering, which is
> handled separately. This patch uses the lo followed by hi word ordering
> which is consistent with current back to back implementation in the
> vfio/pci code.
> 
> Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
> ---
>  drivers/vfio/pci/vfio_pci_rdwr.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/vfio/pci/vfio_pci_rdwr.c b/drivers/vfio/pci/vfio_pci_rdwr.c
> index 66b72c289284..a0595c745732 100644
> --- a/drivers/vfio/pci/vfio_pci_rdwr.c
> +++ b/drivers/vfio/pci/vfio_pci_rdwr.c
> @@ -16,6 +16,7 @@
>  #include <linux/io.h>
>  #include <linux/vfio.h>
>  #include <linux/vgaarb.h>
> +#include <linux/io-64-nonatomic-lo-hi.h>>
>  
>  #include "vfio_pci_priv.h"
>  

Getting from linux/io-64-nonatomic-lo-hi.h to the lib/iomap.c
implementations is a bit of a wild goose chase but I convinced myself
that it happens as you describe when GENERIC_IOMAP is set. Also makes
sense to me to use the linux/io-64-nonatomic-lo-hi.h header for a
generic fallback where the access order matches what vfio already does.

I do wonder if this actually improves things for more than just x86. As
far as I can see powerpc also uses GENERIC_IOMAP with POWERNV which is
also 64 bit and also has users of vfio-pci. So adding Michael Ellerman
for awareness.

Thanks,
Niklas

[PATCH v2 2/2] vfio/pci: Remove #ifdef iowrite64 and #ifdef ioread64

[Ramesh Thomas]

Remove the #ifdef iowrite64 and #ifdef ioread64 checks around calls to
64 bit IO access. Since default implementations have been enabled, the
checks are not required. Such checks can hide potential bugs as well.
Instead check for CONFIG_64BIT to make the 64 bit IO calls only when 64
bit support is enabled.

Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
---
 drivers/vfio/pci/vfio_pci_rdwr.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/vfio/pci/vfio_pci_rdwr.c b/drivers/vfio/pci/vfio_pci_rdwr.c
index a0595c745732..02a3f1cb8f77 100644
--- a/drivers/vfio/pci/vfio_pci_rdwr.c
+++ b/drivers/vfio/pci/vfio_pci_rdwr.c
@@ -62,7 +62,7 @@ EXPORT_SYMBOL_GPL(vfio_pci_core_iowrite##size);
 VFIO_IOWRITE(8)
 VFIO_IOWRITE(16)
 VFIO_IOWRITE(32)
-#ifdef iowrite64
+#ifdef CONFIG_64BIT
 VFIO_IOWRITE(64)
 #endif
 
@@ -90,7 +90,7 @@ EXPORT_SYMBOL_GPL(vfio_pci_core_ioread##size);
 VFIO_IOREAD(8)
 VFIO_IOREAD(16)
 VFIO_IOREAD(32)
-#ifdef ioread64
+#ifdef CONFIG_64BIT
 VFIO_IOREAD(64)
 #endif
 
@@ -128,7 +128,7 @@ static int vfio_pci_iordwr##size(struct vfio_pci_core_device *vdev,\
 VFIO_IORDWR(8)
 VFIO_IORDWR(16)
 VFIO_IORDWR(32)
-#if defined(ioread64) && defined(iowrite64)
+#ifdef CONFIG_64BIT
 VFIO_IORDWR(64)
 #endif
 
@@ -156,7 +156,7 @@ ssize_t vfio_pci_core_do_io_rw(struct vfio_pci_core_device *vdev, bool test_mem,
 		else
 			fillable = 0;
 
-#if defined(ioread64) && defined(iowrite64)
+#ifdef CONFIG_64BIT
 		if (fillable >= 8 && !(off % 8)) {
 			ret = vfio_pci_iordwr64(vdev, iswrite, test_mem,
 						io, buf, off, &filled);
@@ -382,7 +382,7 @@ static void vfio_pci_ioeventfd_do_write(struct vfio_pci_ioeventfd *ioeventfd,
 		vfio_pci_core_iowrite32(ioeventfd->vdev, test_mem,
 					ioeventfd->data, ioeventfd->addr);
 		break;
-#ifdef iowrite64
+#ifdef CONFIG_64BIT
 	case 8:
 		vfio_pci_core_iowrite64(ioeventfd->vdev, test_mem,
 					ioeventfd->data, ioeventfd->addr);
@@ -441,7 +441,7 @@ int vfio_pci_ioeventfd(struct vfio_pci_core_device *vdev, loff_t offset,
 	      pos >= vdev->msix_offset + vdev->msix_size))
 		return -EINVAL;
 
-#ifndef iowrite64
+#ifndef CONFIG_64BIT
 	if (count == 8)
 		return -EINVAL;
 #endif
-- 
2.34.1

Re: [PATCH v2 2/2] vfio/pci: Remove #ifdef iowrite64 and #ifdef ioread64

[Jason Gunthorpe]

On Tue, Dec 03, 2024 at 10:41:58AM -0800, Ramesh Thomas wrote:
> Remove the #ifdef iowrite64 and #ifdef ioread64 checks around calls to
> 64 bit IO access. Since default implementations have been enabled, the
> checks are not required. Such checks can hide potential bugs as well.
> Instead check for CONFIG_64BIT to make the 64 bit IO calls only when 64
> bit support is enabled.

Why?

The whole point of the emulation header to to avoid this?

I think you would just include the header and then remove the ifdef
entirely. Instead of vfio doing memcpy with 32 bit it will do memcpy
internally to the io accessors?

There is nothing about this that has to be atomic or something.

Jason

Re: [PATCH v2 2/2] vfio/pci: Remove #ifdef iowrite64 and #ifdef ioread64

[Thomas, Ramesh]

On 12/9/2024 10:19 AM, Jason Gunthorpe wrote:
> On Tue, Dec 03, 2024 at 10:41:58AM -0800, Ramesh Thomas wrote:
>> Remove the #ifdef iowrite64 and #ifdef ioread64 checks around calls to
>> 64 bit IO access. Since default implementations have been enabled, the
>> checks are not required. Such checks can hide potential bugs as well.
>> Instead check for CONFIG_64BIT to make the 64 bit IO calls only when 64
>> bit support is enabled.
> Why?
>
> The whole point of the emulation header to to avoid this?
>
> I think you would just include the header and then remove the ifdef
> entirely. Instead of vfio doing memcpy with 32 bit it will do memcpy
> internally to the io accessors?
>
> There is nothing about this that has to be atomic or something.

Ok, I will send a new patch series that only removes the check for 
ioread64 and iowrite64.

Thanks,

Ramesh