From: Ramesh Thomas <ramesh.thomas@intel.com>
To: alex.williamson@redhat.com, jgg@ziepe.ca, schnelle@linux.ibm.com,
gbayer@linux.ibm.com
Cc: kvm@vger.kernel.org, linux-s390@vger.kernel.org,
ankita@nvidia.com, yishaih@nvidia.com, pasic@linux.ibm.com,
julianr@linux.ibm.com, bpsegal@us.ibm.com,
ramesh.thomas@intel.com, kevin.tian@intel.com, cho@microsoft.com
Subject: [PATCH v3 2/2] vfio/pci: Remove #ifdef iowrite64 and #ifdef ioread64
Date: Tue, 10 Dec 2024 05:19:38 -0800 [thread overview]
Message-ID: <20241210131938.303500-3-ramesh.thomas@intel.com> (raw)
In-Reply-To: <20241210131938.303500-1-ramesh.thomas@intel.com>
Remove the #ifdef iowrite64 and #ifdef ioread64 checks around calls to
64 bit IO access. Since default implementations have been enabled, the
checks are not required.
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
---
drivers/vfio/pci/vfio_pci_rdwr.c | 12 ------------
1 file changed, 12 deletions(-)
diff --git a/drivers/vfio/pci/vfio_pci_rdwr.c b/drivers/vfio/pci/vfio_pci_rdwr.c
index a0595c745732..78a3d0809415 100644
--- a/drivers/vfio/pci/vfio_pci_rdwr.c
+++ b/drivers/vfio/pci/vfio_pci_rdwr.c
@@ -62,9 +62,7 @@ EXPORT_SYMBOL_GPL(vfio_pci_core_iowrite##size);
VFIO_IOWRITE(8)
VFIO_IOWRITE(16)
VFIO_IOWRITE(32)
-#ifdef iowrite64
VFIO_IOWRITE(64)
-#endif
#define VFIO_IOREAD(size) \
int vfio_pci_core_ioread##size(struct vfio_pci_core_device *vdev, \
@@ -90,9 +88,7 @@ EXPORT_SYMBOL_GPL(vfio_pci_core_ioread##size);
VFIO_IOREAD(8)
VFIO_IOREAD(16)
VFIO_IOREAD(32)
-#ifdef ioread64
VFIO_IOREAD(64)
-#endif
#define VFIO_IORDWR(size) \
static int vfio_pci_iordwr##size(struct vfio_pci_core_device *vdev,\
@@ -128,9 +124,7 @@ static int vfio_pci_iordwr##size(struct vfio_pci_core_device *vdev,\
VFIO_IORDWR(8)
VFIO_IORDWR(16)
VFIO_IORDWR(32)
-#if defined(ioread64) && defined(iowrite64)
VFIO_IORDWR(64)
-#endif
/*
* Read or write from an __iomem region (MMIO or I/O port) with an excluded
@@ -156,7 +150,6 @@ ssize_t vfio_pci_core_do_io_rw(struct vfio_pci_core_device *vdev, bool test_mem,
else
fillable = 0;
-#if defined(ioread64) && defined(iowrite64)
if (fillable >= 8 && !(off % 8)) {
ret = vfio_pci_iordwr64(vdev, iswrite, test_mem,
io, buf, off, &filled);
@@ -164,7 +157,6 @@ ssize_t vfio_pci_core_do_io_rw(struct vfio_pci_core_device *vdev, bool test_mem,
return ret;
} else
-#endif
if (fillable >= 4 && !(off % 4)) {
ret = vfio_pci_iordwr32(vdev, iswrite, test_mem,
io, buf, off, &filled);
@@ -382,12 +374,10 @@ static void vfio_pci_ioeventfd_do_write(struct vfio_pci_ioeventfd *ioeventfd,
vfio_pci_core_iowrite32(ioeventfd->vdev, test_mem,
ioeventfd->data, ioeventfd->addr);
break;
-#ifdef iowrite64
case 8:
vfio_pci_core_iowrite64(ioeventfd->vdev, test_mem,
ioeventfd->data, ioeventfd->addr);
break;
-#endif
}
}
@@ -441,10 +431,8 @@ int vfio_pci_ioeventfd(struct vfio_pci_core_device *vdev, loff_t offset,
pos >= vdev->msix_offset + vdev->msix_size))
return -EINVAL;
-#ifndef iowrite64
if (count == 8)
return -EINVAL;
-#endif
ret = vfio_pci_core_setup_barmap(vdev, bar);
if (ret)
--
2.34.1
next prev parent reply other threads:[~2024-12-10 13:25 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-10 13:19 [PATCH v3 0/2] Extend 8-byte PCI load/store support to x86 arch Ramesh Thomas
2024-12-10 13:19 ` [PATCH v3 1/2] vfio/pci: Enable iowrite64 and ioread64 for vfio pci Ramesh Thomas
2024-12-10 13:58 ` Jason Gunthorpe
2024-12-10 13:19 ` Ramesh Thomas [this message]
2024-12-10 13:58 ` [PATCH v3 2/2] vfio/pci: Remove #ifdef iowrite64 and #ifdef ioread64 Jason Gunthorpe
2025-01-06 16:28 ` [PATCH v3 0/2] Extend 8-byte PCI load/store support to x86 arch Alex Williamson
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