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[213.175.37.10]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38bf32151f1sm19447922f8f.14.2025.01.23.04.41.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Jan 2025 04:41:49 -0800 (PST) Date: Thu, 23 Jan 2025 13:41:48 +0100 From: Igor Mammedov To: Xiaoyao Li Cc: Paolo Bonzini , Riku Voipio , Richard Henderson , Zhao Liu , "Michael S. Tsirkin" , Marcel Apfelbaum , Ani Sinha , Philippe =?UTF-8?B?TWF0aGlldS1EYXVkw6k=?= , Yanan Wang , Cornelia Huck , "Daniel P. =?UTF-8?B?QmVycmFuZ8Op?=" , Eric Blake , Markus Armbruster , Marcelo Tosatti , rick.p.edgecombe@intel.com, kvm@vger.kernel.org, qemu-devel@nongnu.org Subject: Re: [PATCH v6 40/60] hw/i386: add eoi_intercept_unsupported member to X86MachineState Message-ID: <20250123134148.036d52b0@imammedo.users.ipa.redhat.com> In-Reply-To: <20241105062408.3533704-41-xiaoyao.li@intel.com> References: <20241105062408.3533704-1-xiaoyao.li@intel.com> <20241105062408.3533704-41-xiaoyao.li@intel.com> X-Mailer: Claws Mail 4.3.0 (GTK 3.24.43; x86_64-redhat-linux-gnu) Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Tue, 5 Nov 2024 01:23:48 -0500 Xiaoyao Li wrote: > Add a new bool member, eoi_intercept_unsupported, to X86MachineState > with default value false. Set true for TDX VM. I'd rename it to enable_eoi_intercept, by default set to true for evrything and make TDX override this to false. > > Inability to intercept eoi causes impossibility to emulate level > triggered interrupt to be re-injected when level is still kept active. > which affects interrupt controller emulation. > > Signed-off-by: Xiaoyao Li > Acked-by: Gerd Hoffmann > --- > hw/i386/x86.c | 1 + > include/hw/i386/x86.h | 1 + > target/i386/kvm/tdx.c | 2 ++ > 3 files changed, 4 insertions(+) > > diff --git a/hw/i386/x86.c b/hw/i386/x86.c > index 01fc5e656272..82faeed24ff9 100644 > --- a/hw/i386/x86.c > +++ b/hw/i386/x86.c > @@ -370,6 +370,7 @@ static void x86_machine_initfn(Object *obj) > x86ms->oem_table_id = g_strndup(ACPI_BUILD_APPNAME8, 8); > x86ms->bus_lock_ratelimit = 0; > x86ms->above_4g_mem_start = 4 * GiB; > + x86ms->eoi_intercept_unsupported = false; > } > > static void x86_machine_class_init(ObjectClass *oc, void *data) > diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h > index d43cb3908e65..fd9a30391755 100644 > --- a/include/hw/i386/x86.h > +++ b/include/hw/i386/x86.h > @@ -73,6 +73,7 @@ struct X86MachineState { > uint64_t above_4g_mem_start; > > /* CPU and apic information: */ > + bool eoi_intercept_unsupported; > unsigned pci_irq_mask; > unsigned apic_id_limit; > uint16_t boot_cpus; > diff --git a/target/i386/kvm/tdx.c b/target/i386/kvm/tdx.c > index 9ab4e911f78a..9dcb77e011bd 100644 > --- a/target/i386/kvm/tdx.c > +++ b/target/i386/kvm/tdx.c > @@ -388,6 +388,8 @@ static int tdx_kvm_init(ConfidentialGuestSupport *cgs, Error **errp) > return -EOPNOTSUPP; > } > > + x86ms->eoi_intercept_unsupported = true; I don't particulary like accel go to its parent (machine) object and override things there and that being buried deep inside. How do you start TDX guest? Is there a machine property or something like it to enable TDX? > + > /* > * Set kvm_readonly_mem_allowed to false, because TDX only supports readonly > * memory for shared memory but not for private memory. Besides, whether a