Re: [PATCH v6 35/60] i386/cpu: Introduce enable_cpuid_0x1f to force exposing CPUID 0x1f

Xiaoyao Li
2025-01-14T12:51:40Z

On 12/13/2024 6:16 AM, Ira Weiny wrote:
> On Tue, Nov 05, 2024 at 01:23:43AM -0500, Xiaoyao Li wrote:
>> Currently, QEMU exposes CPUID 0x1f to guest only when necessary, i.e.,
>> when topology level that cannot be enumerated by leaf 0xB, e.g., die or
>> module level, are configured for the guest, e.g., -smp xx,dies=2.
>>
>> However, TDX architecture forces to require CPUID 0x1f to configure CPU
>> topology.
>>
>> Introduce a bool flag, enable_cpuid_0x1f, in CPU for the case that
>> requires CPUID leaf 0x1f to be exposed to guest.
>>
>> Introduce a new function x86_has_cpuid_0x1f(), which is the warpper of
>> cpu->enable_cpuid_0x1f and x86_has_extended_topo() to check if it needs
>> to enable cpuid leaf 0x1f for the guest.
>
> Could you elaborate on the relation between cpuid_0x1f and the extended
> topology support? I feel like x86_has_cpuid_0x1f() is a poor name for this
> check.

CPUID leaf 0xb is "Exteneded Topology Enumeration leaf", which can only
enumerate topology level of thread and core.

CPUID leaf 0x1f is "v2 Extended Topology Enumeration leaf" which can
enumerate more level than leaf 0xb, e.g., module, tile, die.

QEMU enumerates CPUID leaf to 0x1f to guest only when necessary. i.e.,
when the topology of the guest is configured to have levels beyond
thread and core. However, TDX mandates to use CPUID leaf 0x1f for
topology configuration.

So this patch defines "enable_cpuid_0x1f" to expose CPUID leaf 0x1f even
when only thread and core level topology are configured.

(BTW, x86_has_extended_topo() actually mean x86_has_v2_extended_topo())

> Perhaps I'm just not understanding what is required here?
>
> Ira
>
>>
>> Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
>> ---
>> target/i386/cpu.c | 4 ++--
>> target/i386/cpu.h | 9 +++++++++
>> target/i386/kvm/kvm.c | 2 +-
>> 3 files changed, 12 insertions(+), 3 deletions(-)
>>
>> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
>> index 1ffbafef03e7..119b38bcb0c1 100644
>> --- a/target/i386/cpu.c
>> +++ b/target/i386/cpu.c
>> @@ -6731,7 +6731,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
>> break;
>> case 0x1F:
>> /* V2 Extended Topology Enumeration Leaf */
>> - if (!x86_has_extended_topo(env->avail_cpu_topo)) {
>> + if (!x86_has_cpuid_0x1f(cpu)) {
>> *eax = *ebx = *ecx = *edx = 0;
>> break;
>> }
>> @@ -7588,7 +7588,7 @@ void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
>> * cpu->vendor_cpuid_only has been unset for compatibility with older
>> * machine types.
>> */
>> - if (x86_has_extended_topo(env->avail_cpu_topo) &&
>> + if (x86_has_cpuid_0x1f(cpu) &&
>> (IS_INTEL_CPU(env) || !cpu->vendor_cpuid_only)) {
>> x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x1F);
>> }
>> diff --git a/target/i386/cpu.h b/target/i386/cpu.h
>> index 59959b8b7a4d..dcc673262c06 100644
>> --- a/target/i386/cpu.h
>> +++ b/target/i386/cpu.h
>> @@ -2171,6 +2171,9 @@ struct ArchCPU {
>> /* Compatibility bits for old machine types: */
>> bool enable_cpuid_0xb;
>>
>> + /* Force to enable cpuid 0x1f */
>> + bool enable_cpuid_0x1f;
>> +
>> /* Enable auto level-increase for all CPUID leaves */
>> bool full_cpuid_auto_level;
>>
>> @@ -2431,6 +2434,12 @@ void host_cpuid(uint32_t function, uint32_t count,
>> uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx);
>> bool cpu_has_x2apic_feature(CPUX86State *env);
>>
>> +static inline bool x86_has_cpuid_0x1f(X86CPU *cpu)
>> +{
>> + return cpu->enable_cpuid_0x1f ||
>> + x86_has_extended_topo(cpu->env.avail_cpu_topo);
>> +}
>> +
>> /* helper.c */
>> void x86_cpu_set_a20(X86CPU *cpu, int a20_state);
>> void cpu_sync_avx_hflag(CPUX86State *env);
>> diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
>> index dea0f83370d5..022809bad36e 100644
>> --- a/target/i386/kvm/kvm.c
>> +++ b/target/i386/kvm/kvm.c
>> @@ -1874,7 +1874,7 @@ uint32_t kvm_x86_build_cpuid(CPUX86State *env, struct kvm_cpuid_entry2 *entries,
>> break;
>> }
>> case 0x1f:
>> - if (!x86_has_extended_topo(env->avail_cpu_topo)) {
>> + if (!x86_has_cpuid_0x1f(env_archcpu(env))) {
>> cpuid_i--;
>> break;
>> }
>> --
>> 2.34.1
>>