From: Sean Christopherson <seanjc@google.com>
To: Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
x86@kernel.org, Paolo Bonzini <pbonzini@redhat.com>
Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
"Sean Christopherson" <seanjc@google.com>,
"Dionna Glaze" <dionnaglaze@google.com>,
"Peter Gonda" <pgonda@google.com>,
"Jürgen Groß" <jgross@suse.com>,
"Kirill Shutemov" <kirill.shutemov@linux.intel.com>,
"Vitaly Kuznetsov" <vkuznets@redhat.com>,
"H . Peter Anvin" <hpa@zytor.com>,
"Binbin Wu" <binbin.wu@intel.com>,
"Tom Lendacky" <thomas.lendacky@amd.com>
Subject: [PATCH 1/2] x86/mtrr: Return success vs. "failure" from guest_force_mtrr_state()
Date: Fri, 31 Jan 2025 16:50:47 -0800 [thread overview]
Message-ID: <20250201005048.657470-2-seanjc@google.com> (raw)
In-Reply-To: <20250201005048.657470-1-seanjc@google.com>
When *potentially* forcing MTRRs to a single memory type, return whether
or not MTRRs were indeed overridden so that the caller can take additional
action when necessary. E.g. KVM-as-a-guest will use the information to
also force the PAT memtype for legacy devices to be WB.
Cc: stable@vger.kernel.org
Signed-off-by: Sean Christopherson <seanjc@google.com>
---
arch/x86/include/asm/mtrr.h | 5 +++--
arch/x86/kernel/cpu/mtrr/generic.c | 11 +++++++----
2 files changed, 10 insertions(+), 6 deletions(-)
diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h
index c69e269937c5..598753189f19 100644
--- a/arch/x86/include/asm/mtrr.h
+++ b/arch/x86/include/asm/mtrr.h
@@ -58,7 +58,7 @@ struct mtrr_state_type {
*/
# ifdef CONFIG_MTRR
void mtrr_bp_init(void);
-void guest_force_mtrr_state(struct mtrr_var_range *var, unsigned int num_var,
+bool guest_force_mtrr_state(struct mtrr_var_range *var, unsigned int num_var,
mtrr_type def_type);
extern u8 mtrr_type_lookup(u64 addr, u64 end, u8 *uniform);
extern void mtrr_save_fixed_ranges(void *);
@@ -75,10 +75,11 @@ void mtrr_disable(void);
void mtrr_enable(void);
void mtrr_generic_set_state(void);
# else
-static inline void guest_force_mtrr_state(struct mtrr_var_range *var,
+static inline bool guest_force_mtrr_state(struct mtrr_var_range *var,
unsigned int num_var,
mtrr_type def_type)
{
+ return false;
}
static inline u8 mtrr_type_lookup(u64 addr, u64 end, u8 *uniform)
diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c
index 2fdfda2b60e4..4fd704907dbc 100644
--- a/arch/x86/kernel/cpu/mtrr/generic.c
+++ b/arch/x86/kernel/cpu/mtrr/generic.c
@@ -435,19 +435,21 @@ void __init mtrr_copy_map(void)
* @var: MTRR variable range array to use
* @num_var: length of the @var array
* @def_type: default caching type
+ *
+ * Returns %true if MTRRs were overridden, %false if they were not.
*/
-void guest_force_mtrr_state(struct mtrr_var_range *var, unsigned int num_var,
+bool guest_force_mtrr_state(struct mtrr_var_range *var, unsigned int num_var,
mtrr_type def_type)
{
unsigned int i;
/* Only allowed to be called once before mtrr_bp_init(). */
if (WARN_ON_ONCE(mtrr_state_set))
- return;
+ return false;
/* Only allowed when running virtualized. */
if (!cpu_feature_enabled(X86_FEATURE_HYPERVISOR))
- return;
+ return false;
/*
* Only allowed for special virtualization cases:
@@ -460,7 +462,7 @@ void guest_force_mtrr_state(struct mtrr_var_range *var, unsigned int num_var,
!hv_is_isolation_supported() &&
!cpu_feature_enabled(X86_FEATURE_XENPV) &&
!cpu_feature_enabled(X86_FEATURE_TDX_GUEST))
- return;
+ return false;
/* Disable MTRR in order to disable MTRR modifications. */
setup_clear_cpu_cap(X86_FEATURE_MTRR);
@@ -480,6 +482,7 @@ void guest_force_mtrr_state(struct mtrr_var_range *var, unsigned int num_var,
mtrr_state.enabled |= MTRR_STATE_MTRR_ENABLED;
mtrr_state_set = 1;
+ return true;
}
static u8 type_merge(u8 type, u8 new_type, u8 *uniform)
--
2.48.1.362.g079036d154-goog
next prev parent reply other threads:[~2025-02-01 0:50 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-01 0:50 [PATCH 0/2] x86/kvm: Force legacy PCI hole as WB under SNP/TDX Sean Christopherson
2025-02-01 0:50 ` Sean Christopherson [this message]
2025-02-01 0:50 ` [PATCH 2/2] x86/kvm: Override low memory above TOLUD to WB when MTRRs are forced WB Sean Christopherson
2025-02-01 14:25 ` [PATCH 0/2] x86/kvm: Force legacy PCI hole as WB under SNP/TDX Dionna Amalie Glaze
2025-02-03 18:14 ` Edgecombe, Rick P
2025-02-03 20:33 ` Sean Christopherson
2025-02-03 23:01 ` Edgecombe, Rick P
2025-02-04 0:27 ` Sean Christopherson
2025-02-05 3:51 ` Edgecombe, Rick P
2025-02-05 7:49 ` Xu, Min M
2025-02-10 15:29 ` Binbin Wu
2025-07-08 14:24 ` Nikolay Borisov
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