From: Nicolas Saenz Julienne <nsaenz@amazon.com>
To: <pbonzini@redhat.com>
Cc: <kvm@vger.kernel.org>, <nh-open-source@amazon.com>, <nsaenz@amazon.com>
Subject: [kvm-unit-tests PATCH] x86: Make set/clear_bit() atomic
Date: Fri, 14 Feb 2025 17:36:44 +0000 [thread overview]
Message-ID: <20250214173644.22895-1-nsaenz@amazon.com> (raw)
x86 is the only architecture that defines set/clear_bit() as non-atomic.
This makes it incompatible with arch-agnostic code that might implicitly
require atomicity. And it was observed to corrupt the 'online_cpus'
bitmap, as non BSP CPUs perform RmWs on the bitmap concurrently during
bring up. See:
ap_start64()
save_id()
set_bit(apic_id(), online_cpus)
Address this by making set/clear_bit() atomic.
Signed-off-by: Nicolas Saenz Julienne <nsaenz@amazon.com>
---
lib/x86/processor.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/lib/x86/processor.h b/lib/x86/processor.h
index da1ed662..82507787 100644
--- a/lib/x86/processor.h
+++ b/lib/x86/processor.h
@@ -843,13 +843,13 @@ static inline bool is_canonical(u64 addr)
static inline void clear_bit(int bit, u8 *addr)
{
- __asm__ __volatile__("btr %1, %0"
+ __asm__ __volatile__("lock; btr %1, %0"
: "+m" (*addr) : "Ir" (bit) : "cc", "memory");
}
static inline void set_bit(int bit, u8 *addr)
{
- __asm__ __volatile__("bts %1, %0"
+ __asm__ __volatile__("lock; bts %1, %0"
: "+m" (*addr) : "Ir" (bit) : "cc", "memory");
}
--
2.47.1
next reply other threads:[~2025-02-14 17:37 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-14 17:36 Nicolas Saenz Julienne [this message]
2025-02-15 1:18 ` [kvm-unit-tests PATCH] x86: Make set/clear_bit() atomic Sean Christopherson
2025-02-24 17:23 ` Sean Christopherson
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