From: Nikunj A Dadhania <nikunj@amd.com>
To: <seanjc@google.com>, <pbonzini@redhat.com>, <kvm@vger.kernel.org>
Cc: <thomas.lendacky@amd.com>, <santosh.shukla@amd.com>,
<bp@alien8.de>, <nikunj@amd.com>, <isaku.yamahata@intel.com>
Subject: [PATCH v4 4/5] KVM: SVM: Prevent writes to TSC MSR when Secure TSC is enabled
Date: Mon, 10 Mar 2025 12:15:21 +0530 [thread overview]
Message-ID: <20250310064522.14100-3-nikunj@amd.com> (raw)
In-Reply-To: <20250310064522.14100-1-nikunj@amd.com>
Disallow writes to MSR_IA32_TSC for Secure TSC enabled SNP guests. Even if
KVM attempts to emulate such writes, TSC calculation will ignore the
TSC_SCALE and TSC_OFFSET present in the VMCB. Instead, it will use
GUEST_TSC_SCALE and GUEST_TSC_OFFSET stored in the VMSA.
Additionally, incorporate a check for protected guest state to allow the
VMM to initialize the TSC MSR.
Signed-off-by: Nikunj A Dadhania <nikunj@amd.com>
---
arch/x86/kvm/svm/svm.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index e65721db1f81..1652848b0240 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -3161,6 +3161,25 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
svm->tsc_aux = data;
break;
+ case MSR_IA32_TSC:
+ /*
+ * For Secure TSC enabled VM, do not emulate TSC write as the
+ * TSC calculation ignores the TSC_OFFSET and TSC_SCALE control
+ * fields.
+ *
+ * Guest writes: Record the error and return a #GP.
+ * Host writes are ignored.
+ */
+ if (snp_secure_tsc_enabled(vcpu->kvm)) {
+ if (!msr->host_initiated) {
+ vcpu_unimpl(vcpu, "unimplemented IA32_TSC for Secure TSC\n");
+ return 1;
+ } else
+ return 0;
+ }
+
+ ret = kvm_set_msr_common(vcpu, msr);
+ break;
case MSR_IA32_DEBUGCTLMSR:
if (!lbrv) {
kvm_pr_unimpl_wrmsr(vcpu, ecx, data);
--
2.43.0
next prev parent reply other threads:[~2025-03-10 6:45 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-10 6:39 [PATCH v4 0/5] Enable Secure TSC for SEV-SNP Nikunj A Dadhania
2025-03-10 6:43 ` [PATCH v4 1/5] x86/cpufeatures: Add SNP Secure TSC Nikunj A Dadhania
2025-03-10 15:03 ` Tom Lendacky
2025-03-13 15:15 ` Vaishali Thakkar
2025-03-13 15:38 ` Borislav Petkov
2025-03-10 6:45 ` [PATCH v4 2/5] KVM: SVM: Add missing member in SNP_LAUNCH_START command structure Nikunj A Dadhania
2025-03-10 6:45 ` [PATCH v4 3/5] KVM: SVM: Add GUEST_TSC_FREQ MSR for Secure TSC enabled guests Nikunj A Dadhania
2025-03-10 15:09 ` Tom Lendacky
2025-03-10 6:45 ` Nikunj A Dadhania [this message]
2025-03-10 15:23 ` [PATCH v4 4/5] KVM: SVM: Prevent writes to TSC MSR when Secure TSC is enabled Tom Lendacky
2025-03-11 6:49 ` Nikunj A. Dadhania
2025-03-10 6:45 ` [PATCH v4 5/5] KVM: SVM: Enable Secure TSC for SNP guests Nikunj A Dadhania
2025-03-10 15:39 ` Tom Lendacky
2025-03-11 9:11 ` Nikunj A. Dadhania
2025-03-11 11:05 ` Nikunj A. Dadhania
2025-03-11 14:33 ` Tom Lendacky
2025-03-11 14:52 ` Sean Christopherson
2025-03-11 15:33 ` Nikunj A. Dadhania
2025-03-11 15:53 ` Sean Christopherson
2025-03-11 16:02 ` Nikunj A. Dadhania
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