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Thu, 13 Mar 2025 06:19:33 -0700 (PDT) Date: Thu, 13 Mar 2025 14:19:32 +0100 From: Andrew Jones To: =?utf-8?B?Q2zDqW1lbnQgTMOpZ2Vy?= Cc: Paul Walmsley , Palmer Dabbelt , Anup Patel , Atish Patra , Shuah Khan , Jonathan Corbet , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org, Samuel Holland Subject: Re: [PATCH v3 08/17] riscv: misaligned: add a function to check misalign trap delegability Message-ID: <20250313-4bea400c5770a5a5d3d70b38@orel> References: <20250310151229.2365992-1-cleger@rivosinc.com> <20250310151229.2365992-9-cleger@rivosinc.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20250310151229.2365992-9-cleger@rivosinc.com> On Mon, Mar 10, 2025 at 04:12:15PM +0100, Clément Léger wrote: > Checking for the delegability of the misaligned access trap is needed > for the KVM FWFT extension implementation. Add a function to get the > delegability of the misaligned trap exception. > > Signed-off-by: Clément Léger > --- > arch/riscv/include/asm/cpufeature.h | 5 +++++ > arch/riscv/kernel/traps_misaligned.c | 17 +++++++++++++++-- > 2 files changed, 20 insertions(+), 2 deletions(-) > > diff --git a/arch/riscv/include/asm/cpufeature.h b/arch/riscv/include/asm/cpufeature.h > index ad7d26788e6a..8b97cba99fc3 100644 > --- a/arch/riscv/include/asm/cpufeature.h > +++ b/arch/riscv/include/asm/cpufeature.h > @@ -69,12 +69,17 @@ int cpu_online_unaligned_access_init(unsigned int cpu); > #if defined(CONFIG_RISCV_SCALAR_MISALIGNED) > void unaligned_emulation_finish(void); > bool unaligned_ctl_available(void); > +bool misaligned_traps_can_delegate(void); > DECLARE_PER_CPU(long, misaligned_access_speed); > #else > static inline bool unaligned_ctl_available(void) > { > return false; > } > +static inline bool misaligned_traps_can_delegate(void) > +{ > + return false; > +} > #endif > > bool check_vector_unaligned_access_emulated_all_cpus(void); > diff --git a/arch/riscv/kernel/traps_misaligned.c b/arch/riscv/kernel/traps_misaligned.c > index db31966a834e..a67a6e709a06 100644 > --- a/arch/riscv/kernel/traps_misaligned.c > +++ b/arch/riscv/kernel/traps_misaligned.c > @@ -716,10 +716,10 @@ static int cpu_online_check_unaligned_access_emulated(unsigned int cpu) > } > #endif > > -#ifdef CONFIG_RISCV_SBI > - > static bool misaligned_traps_delegated; > > +#ifdef CONFIG_RISCV_SBI > + > static int cpu_online_sbi_unaligned_setup(unsigned int cpu) > { > if (sbi_fwft_set(SBI_FWFT_MISALIGNED_EXC_DELEG, 1, 0) && > @@ -761,6 +761,7 @@ static int cpu_online_sbi_unaligned_setup(unsigned int cpu __always_unused) > { > return 0; > } > + > #endif > > int cpu_online_unaligned_access_init(unsigned int cpu) > @@ -773,3 +774,15 @@ int cpu_online_unaligned_access_init(unsigned int cpu) > > return cpu_online_check_unaligned_access_emulated(cpu); > } > + > +bool misaligned_traps_can_delegate(void) > +{ > + /* > + * Either we successfully requested misaligned traps delegation for all > + * CPUS or the SBI does not implemented FWFT extension but delegated the > + * exception by default. > + */ > + return misaligned_traps_delegated || > + all_cpus_unaligned_scalar_access_emulated(); > +} > +EXPORT_SYMBOL_GPL(misaligned_traps_can_delegate); > \ No newline at end of file Check your editor settings. > -- > 2.47.2 Reviewed-by: Andrew Jones