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From: Sean Christopherson <seanjc@google.com>
To: Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	 Dave Hansen <dave.hansen@linux.intel.com>,
	x86@kernel.org,  Sean Christopherson <seanjc@google.com>,
	Paolo Bonzini <pbonzini@redhat.com>
Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
	 Jacob Pan <jacob.jun.pan@linux.intel.com>,
	Jim Mattson <jmattson@google.com>
Subject: [PATCH 0/8] x86/irq: KVM: Optimize KVM's PIR harvesting
Date: Fri, 14 Mar 2025 20:06:21 -0700	[thread overview]
Message-ID: <20250315030630.2371712-1-seanjc@google.com> (raw)

Optimizing KVM's PIR harvesting using the same techniques as posted MSIs,
most notably to use 8-byte accesses on 64-bit kernels (/facepalm).

Fix a few warts along the way, and finish up by adding a helper to dedup
the PIR harvesting code between KVM and posted MSIs.

Sean Christopherson (8):
  x86/irq: Ensure initial PIR loads are performed exactly once
  x86/irq: Track if IRQ was found in PIR during initial loop (to load
    PIR vals)
  KVM: VMX: Ensure vIRR isn't reloaded at odd times when sync'ing PIR
  x86/irq: KVM: Track PIR bitmap as an "unsigned long" array
  KVM: VMX: Process PIR using 64-bit accesses on 64-bit kernels
  KVM: VMX: Isolate pure loads from atomic XCHG when processing PIR
  KVM: VMX: Use arch_xchg() when processing PIR to avoid instrumentation
  x86/irq: KVM: Add helper for harvesting PIR to deduplicate KVM and
    posted MSIs

 arch/x86/include/asm/posted_intr.h | 79 +++++++++++++++++++++++++++---
 arch/x86/kernel/irq.c              | 63 ++++--------------------
 arch/x86/kvm/lapic.c               | 20 ++++----
 arch/x86/kvm/lapic.h               |  4 +-
 arch/x86/kvm/vmx/posted_intr.h     |  2 +-
 5 files changed, 96 insertions(+), 72 deletions(-)


base-commit: c9ea48bb6ee6b28bbc956c1e8af98044618fed5e
-- 
2.49.0.rc1.451.g8f38331e32-goog


             reply	other threads:[~2025-03-15  3:06 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-15  3:06 Sean Christopherson [this message]
2025-03-15  3:06 ` [PATCH 1/8] x86/irq: Ensure initial PIR loads are performed exactly once Sean Christopherson
2025-03-17 11:23   ` Thomas Gleixner
2025-03-15  3:06 ` [PATCH 2/8] x86/irq: Track if IRQ was found in PIR during initial loop (to load PIR vals) Sean Christopherson
2025-03-17 13:13   ` Thomas Gleixner
2025-03-17 16:53     ` Sean Christopherson
2025-03-18  9:27       ` Thomas Gleixner
2025-03-15  3:06 ` [PATCH 3/8] KVM: VMX: Ensure vIRR isn't reloaded at odd times when sync'ing PIR Sean Christopherson
2025-03-15  3:06 ` [PATCH 4/8] x86/irq: KVM: Track PIR bitmap as an "unsigned long" array Sean Christopherson
2025-03-15  3:06 ` [PATCH 5/8] KVM: VMX: Process PIR using 64-bit accesses on 64-bit kernels Sean Christopherson
2025-03-15  3:06 ` [PATCH 6/8] KVM: VMX: Isolate pure loads from atomic XCHG when processing PIR Sean Christopherson
2025-03-15  3:06 ` [PATCH 7/8] KVM: VMX: Use arch_xchg() when processing PIR to avoid instrumentation Sean Christopherson
2025-03-15  3:06 ` [PATCH 8/8] x86/irq: KVM: Add helper for harvesting PIR to deduplicate KVM and posted MSIs Sean Christopherson

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