From: Sean Christopherson <seanjc@google.com>
To: Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
x86@kernel.org, Sean Christopherson <seanjc@google.com>,
Paolo Bonzini <pbonzini@redhat.com>
Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
Jacob Pan <jacob.jun.pan@linux.intel.com>,
Jim Mattson <jmattson@google.com>
Subject: [PATCH 1/8] x86/irq: Ensure initial PIR loads are performed exactly once
Date: Fri, 14 Mar 2025 20:06:22 -0700 [thread overview]
Message-ID: <20250315030630.2371712-2-seanjc@google.com> (raw)
In-Reply-To: <20250315030630.2371712-1-seanjc@google.com>
Ensure the PIR is read exactly once at the start of handle_pending_pir(),
to guarantee that checking for an outstanding posted interrupt in a given
chuck doesn't reload the chunk from the "real" PIR. Functionally, a reload
is benign, but it would defeat the purpose of pre-loading into a copy.
Fixes: 1b03d82ba15e ("x86/irq: Install posted MSI notification handler")
Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
Signed-off-by: Sean Christopherson <seanjc@google.com>
---
arch/x86/kernel/irq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
index 385e3a5fc304..9e5263887ff6 100644
--- a/arch/x86/kernel/irq.c
+++ b/arch/x86/kernel/irq.c
@@ -412,7 +412,7 @@ static __always_inline bool handle_pending_pir(u64 *pir, struct pt_regs *regs)
bool handled = false;
for (i = 0; i < 4; i++)
- pir_copy[i] = pir[i];
+ pir_copy[i] = READ_ONCE(pir[i]);
for (i = 0; i < 4; i++) {
if (!pir_copy[i])
--
2.49.0.rc1.451.g8f38331e32-goog
next prev parent reply other threads:[~2025-03-15 3:06 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-15 3:06 [PATCH 0/8] x86/irq: KVM: Optimize KVM's PIR harvesting Sean Christopherson
2025-03-15 3:06 ` Sean Christopherson [this message]
2025-03-17 11:23 ` [PATCH 1/8] x86/irq: Ensure initial PIR loads are performed exactly once Thomas Gleixner
2025-03-15 3:06 ` [PATCH 2/8] x86/irq: Track if IRQ was found in PIR during initial loop (to load PIR vals) Sean Christopherson
2025-03-17 13:13 ` Thomas Gleixner
2025-03-17 16:53 ` Sean Christopherson
2025-03-18 9:27 ` Thomas Gleixner
2025-03-15 3:06 ` [PATCH 3/8] KVM: VMX: Ensure vIRR isn't reloaded at odd times when sync'ing PIR Sean Christopherson
2025-03-15 3:06 ` [PATCH 4/8] x86/irq: KVM: Track PIR bitmap as an "unsigned long" array Sean Christopherson
2025-03-15 3:06 ` [PATCH 5/8] KVM: VMX: Process PIR using 64-bit accesses on 64-bit kernels Sean Christopherson
2025-03-15 3:06 ` [PATCH 6/8] KVM: VMX: Isolate pure loads from atomic XCHG when processing PIR Sean Christopherson
2025-03-15 3:06 ` [PATCH 7/8] KVM: VMX: Use arch_xchg() when processing PIR to avoid instrumentation Sean Christopherson
2025-03-15 3:06 ` [PATCH 8/8] x86/irq: KVM: Add helper for harvesting PIR to deduplicate KVM and posted MSIs Sean Christopherson
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