From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pl1-f179.google.com (mail-pl1-f179.google.com [209.85.214.179]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 94FA02459C5 for ; Thu, 17 Apr 2025 12:25:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.179 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744892713; cv=none; b=mh3mIWJ7usVXg6vQjvnEpOil3a80RxPNjT6KhnhFbJqhS7WXbat/9xa7xDoPuG8xxr0QVPFkDbYY+QWCnwq2CtMWRDsHypBbJN/3qMV5ks3+XtR6eZeSXnFPTMdjBY2c4NEF2hUjtBsp50/m9JHw8Fb9/XO011AYP3wM23OTu5s= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744892713; c=relaxed/simple; bh=Y2lqZNq6iLqWqOnSydPOH5JyZ2wkgBYP5IWsduUOFdg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=AsxUL1OJhpY1kEMPwQup3y0oR8ZxDVWnGsRVzHlLOpGZgtM9B0fcO39Seck+j/cuCeQ+ljGL9kKvX9Ag0iVmzu84RxoPPrHcgKyMgQ6eqe1Dk4gruJ9K5s31wS4xHZx9u1H0v6xlMPSBFiSq3m050XIoKpmPEl7mri5oROjJc9c= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com; spf=pass smtp.mailfrom=rivosinc.com; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b=ki1fBIHL; arc=none smtp.client-ip=209.85.214.179 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b="ki1fBIHL" Received: by mail-pl1-f179.google.com with SMTP id d9443c01a7336-2241053582dso9951915ad.1 for ; Thu, 17 Apr 2025 05:25:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1744892710; x=1745497510; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=QPTklWUDdxW6D5Ost9jmiUOVbTQmyFTBQdSARUhAxLU=; b=ki1fBIHL49ytpWv4z9SYrRoy95lBCJ0DSli9Jrt4gG3l5hVK5uTiAkQFL4ZG48ByAp 9+zreDoPqeBo2LtHMz/gYzfcOMDcyDiSoXoq0NjM1acWkLmAhz2t604Xv3t1ru8wLpy0 /2WTeZlYL+j/ZHKVu7iri2IDJOBRrs0e9opbK5XTkOO1kKnGKWn4XS0YixGIT5fawPMp fNRkn18JJ4UffAdcyFZEKFCATVNVbdXlV8Cp4Behmx7Yb/G4dJ5GJFHzCWS6XZffUgl6 7dQaGXcUsfgG2+sC0iTNazdcTnYU4lIaXuQ9ufuOSll/1mWEF8LIWdG/zVekZxubpNYE 5iqg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1744892710; x=1745497510; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=QPTklWUDdxW6D5Ost9jmiUOVbTQmyFTBQdSARUhAxLU=; b=jLNo+AOGhSRubwHO2E8F4Y9v3jTmeLwVkorxqu11GNR1uVWxO4mrY3Nb9OkQF5azFK /P9KLCYfPJmlVEhEsMJRFaz6c0NorZGxj51qEMs5j5tFJp59eL5FtVrZpkzCKYl84RR5 /RobmBe+VKbw6/6oBwmoYPFoldmhWXWirn3T+z440c6iVwlsI8oOZMnnQmgt9o3N31SL Pldjv60M435gE9RwOiJz/U+DAyn+65hbwbwF+i/wHvs76j7lqwqDnphNWHxIsdu/RDLv TDxBd2Ch5TPmpEUGfkyOSqY8ZyO2LiMw9IVOhysxrpinunGrG7zdZQNuYUGQuZrVTgPN hYTg== X-Forwarded-Encrypted: i=1; AJvYcCUBRjbUCYSbMMlqaZL6SD3YW1lLwKgGkU0t9BR+tjEog0ujxMDWiBynvplVM7daOD5Lqok=@vger.kernel.org X-Gm-Message-State: AOJu0Yyo44XkZxI/OBP0YYvqxyenv+bQ030mFxZ4c3tf+O5em9846t25 4BQpOdRVQUYzV0tajcqItaRu31L7pUSR/RcNQcfxyRcA4HBMnM/hi3HtWcCsQAY= X-Gm-Gg: ASbGnctCIebUfDKPcfig2xQvQ3sCe/hcSnKB3yf/HzP2jqLD9YnW49QXOrBaM3ukQKE y78KU1gm6Uz5pDd2cg/L7qNbX6fayNPXdJfRzbGZCeho66a2ofVlksTnzJY9HShr0vPfq53aujh 1IA6xgrE3VL/bW0m6TbU0ZV4ADlM4HHxDRI1XxRnLTBjBgV9kXJG1JT+Od2fw00nVABCoA8DC7X REaH4MY1qH9HqsEjADrRTnoyLtsnX/WDdvauq0R2+CGpW0sBDgfYLwRAV4GB/1XtZg9Ab7bDo2M 3owQGlFYB8tZ0il3c9avywzr4wZz8iRkCTIPgfB8lw== X-Google-Smtp-Source: AGHT+IFHVZ6ZCfLmCo/4Wa4FBs9EaC8NbnVck/zV+hCmYDXn9aie+ex4Lrhj5kJpm3i3DZVuvfUSqQ== X-Received: by 2002:a17:903:2a85:b0:229:1717:8812 with SMTP id d9443c01a7336-22c357b1125mr88299155ad.0.1744892709956; Thu, 17 Apr 2025 05:25:09 -0700 (PDT) Received: from carbon-x1.. ([2a01:e0a:e17:9700:16d2:7456:6634:9626]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-22c3ee1a78dsm18489415ad.253.2025.04.17.05.25.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Apr 2025 05:25:09 -0700 (PDT) From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= To: Paul Walmsley , Palmer Dabbelt , Anup Patel , Atish Patra , Shuah Khan , Jonathan Corbet , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org Cc: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= , Samuel Holland , Andrew Jones Subject: [PATCH v5 08/13] riscv: misaligned: move emulated access uniformity check in a function Date: Thu, 17 Apr 2025 14:19:55 +0200 Message-ID: <20250417122337.547969-9-cleger@rivosinc.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250417122337.547969-1-cleger@rivosinc.com> References: <20250417122337.547969-1-cleger@rivosinc.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Split the code that check for the uniformity of misaligned accesses performance on all cpus from check_unaligned_access_emulated_all_cpus() to its own function which will be used for delegation check. No functional changes intended. Signed-off-by: Clément Léger Reviewed-by: Andrew Jones --- arch/riscv/kernel/traps_misaligned.c | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/arch/riscv/kernel/traps_misaligned.c b/arch/riscv/kernel/traps_misaligned.c index c99d3c05f356..a0007552e7a5 100644 --- a/arch/riscv/kernel/traps_misaligned.c +++ b/arch/riscv/kernel/traps_misaligned.c @@ -666,10 +666,20 @@ static int cpu_online_check_unaligned_access_emulated(unsigned int cpu) return 0; } -bool __init check_unaligned_access_emulated_all_cpus(void) +static bool all_cpus_unaligned_scalar_access_emulated(void) { int cpu; + for_each_online_cpu(cpu) + if (per_cpu(misaligned_access_speed, cpu) != + RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED) + return false; + + return true; +} + +bool __init check_unaligned_access_emulated_all_cpus(void) +{ /* * We can only support PR_UNALIGN controls if all CPUs have misaligned * accesses emulated since tasks requesting such control can run on any @@ -677,10 +687,8 @@ bool __init check_unaligned_access_emulated_all_cpus(void) */ on_each_cpu(check_unaligned_access_emulated, NULL, 1); - for_each_online_cpu(cpu) - if (per_cpu(misaligned_access_speed, cpu) - != RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED) - return false; + if (!all_cpus_unaligned_scalar_access_emulated()) + return false; unaligned_ctl = true; return true; -- 2.49.0