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From: Zhao Liu <zhao1.liu@intel.com>
To: "Paolo Bonzini" <pbonzini@redhat.com>,
	"Marcelo Tosatti" <mtosatti@redhat.com>,
	"Daniel P . Berrangé" <berrange@redhat.com>,
	"Igor Mammedov" <imammedo@redhat.com>
Cc: Babu Moger <babu.moger@amd.com>,
	Ewan Hai <ewanhai-oc@zhaoxin.com>,
	Xiaoyao Li <xiaoyao.li@intel.com>,
	Tejus GK <tejus.gk@nutanix.com>,
	Jason Zeng <jason.zeng@intel.com>,
	Manish Mishra <manish.mishra@nutanix.com>,
	Tao Su <tao1.su@intel.com>,
	qemu-devel@nongnu.org, kvm@vger.kernel.org,
	Zhao Liu <zhao1.liu@intel.com>
Subject: [RFC 01/10] i386/cpu: Mark CPUID[0x80000005] as reserved for Intel
Date: Wed, 23 Apr 2025 19:46:53 +0800	[thread overview]
Message-ID: <20250423114702.1529340-2-zhao1.liu@intel.com> (raw)
In-Reply-To: <20250423114702.1529340-1-zhao1.liu@intel.com>

Per SDM, 0x80000005 leaf is reserved for Intel CPU, and its current
"assert" check blocks adding new cache model for non-AMD CPUs.

Therefore, check the vendor and encode this leaf as all-0 for Intel
CPU. And since Zhaoxin mostly follows Intel behavior, apply the vendor
check for Zhaoxin as well.

Note, for !vendor_cpuid_only case, non-AMD CPU would get the wrong
information, i.e., get AMD's cache model for Intel or Zhaoxin CPUs.
For this case, there is no need to tweak for non-AMD CPUs, because
vendor_cpuid_only has been turned on by default since PC machine v6.1.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
---
 target/i386/cpu.c | 16 ++++++++++++++--
 1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 1b64ceaaba46..8fdafa8aedaf 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -7248,11 +7248,23 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
         *edx = env->cpuid_model[(index - 0x80000002) * 4 + 3];
         break;
     case 0x80000005:
-        /* cache info (L1 cache) */
-        if (cpu->cache_info_passthrough) {
+        /*
+         * cache info (L1 cache)
+         *
+         * For !vendor_cpuid_only case, non-AMD CPU would get the wrong
+         * information, i.e., get AMD's cache model. It doesn't matter,
+         * vendor_cpuid_only has been turned on by default since
+         * PC machine v6.1.
+         */
+        if (cpu->vendor_cpuid_only &&
+            (IS_INTEL_CPU(env) || IS_ZHAOXIN_CPU(env))) {
+            *eax = *ebx = *ecx = *edx = 0;
+            break;
+        } else if (cpu->cache_info_passthrough) {
             x86_cpu_get_cache_cpuid(index, 0, eax, ebx, ecx, edx);
             break;
         }
+
         *eax = (L1_DTLB_2M_ASSOC << 24) | (L1_DTLB_2M_ENTRIES << 16) |
                (L1_ITLB_2M_ASSOC <<  8) | (L1_ITLB_2M_ENTRIES);
         *ebx = (L1_DTLB_4K_ASSOC << 24) | (L1_DTLB_4K_ENTRIES << 16) |
-- 
2.34.1


  reply	other threads:[~2025-04-23 11:26 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-23 11:46 [RFC 00/10] i386/cpu: Cache CPUID fixup, Intel cache model & topo CPUID enhencement Zhao Liu
2025-04-23 11:46 ` Zhao Liu [this message]
2025-04-23 13:05   ` [RFC 01/10] i386/cpu: Mark CPUID[0x80000005] as reserved for Intel Xiaoyao Li
2025-04-24  2:52     ` Zhao Liu
2025-04-24 13:44   ` Ewan Hai
2025-04-25  9:39     ` Zhao Liu
2025-05-26  8:35   ` Ewan Hai
2025-05-27  9:15     ` Zhao Liu
2025-05-27  9:56       ` Ewan Hai
2025-06-24  7:22         ` Zhao Liu
2025-06-24 11:04           ` Ewan Hai
2025-06-25  3:03             ` Zhao Liu
2025-06-25  2:54               ` Ewan Hai
2025-06-25  9:19     ` Zhao Liu
2025-06-25 10:05       ` Ewan Hai
2025-04-23 11:46 ` [RFC 02/10] i386/cpu: Fix CPUID[0x80000006] for Intel CPU Zhao Liu
2025-04-23 11:46 ` [RFC 03/10] i386/cpu: Introduce cache model for SierraForest Zhao Liu
2025-04-23 11:46 ` [RFC 04/10] i386/cpu: Introduce cache model for GraniteRapids Zhao Liu
2025-04-23 11:46 ` [RFC 05/10] i386/cpu: Introduce cache model for SapphireRapids Zhao Liu
2025-04-24  4:54   ` Tejus GK
2025-04-24  6:53     ` Zhao Liu
2025-04-23 11:46 ` [RFC 06/10] i386/cpu: Introduce enable_cpuid_0x1f to force exposing CPUID 0x1f Zhao Liu
2025-05-13 12:45   ` Igor Mammedov
2025-05-14 15:23     ` Zhao Liu
2025-05-15  6:43       ` Xiaoyao Li
2025-04-23 11:46 ` [RFC 07/10] i386/cpu: Add a "cpuid-0x1f" property Zhao Liu
2025-04-23 11:47 ` [RFC 08/10] i386/cpu: Enable 0x1f leaf for SierraForest by default Zhao Liu
2025-04-23 11:47 ` [RFC 09/10] i386/cpu: Enable 0x1f leaf for GraniteRapids " Zhao Liu
2025-04-23 11:47 ` [RFC 10/10] i386/cpu: Enable 0x1f leaf for SapphireRapids " Zhao Liu
2025-04-24  6:57 ` [RFC 00/10] i386/cpu: Cache CPUID fixup, Intel cache model & topo CPUID enhencement Zhao Liu
2025-05-26 10:52 ` Ewan Hai
2025-05-27  9:19   ` Zhao Liu
2025-05-27  9:58     ` Ewan Hai

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