From: Andrew Jones <ajones@ventanamicro.com>
To: "Clément Léger" <cleger@rivosinc.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Anup Patel <anup@brainfault.org>,
Atish Patra <atishp@atishpatra.org>,
Shuah Khan <shuah@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-doc@vger.kernel.org, kvm@vger.kernel.org,
kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org,
Samuel Holland <samuel.holland@sifive.com>
Subject: Re: [PATCH v5 03/13] riscv: sbi: add FWFT extension interface
Date: Thu, 24 Apr 2025 13:00:50 +0200 [thread overview]
Message-ID: <20250424-c85c9d2f189fe4470038b519@orel> (raw)
In-Reply-To: <20250417122337.547969-4-cleger@rivosinc.com>
On Thu, Apr 17, 2025 at 02:19:50PM +0200, Clément Léger wrote:
> This SBI extensions enables supervisor mode to control feature that are
> under M-mode control (For instance, Svadu menvcfg ADUE bit, Ssdbltrp
> DTE, etc). Add an interface to set local features for a specific cpu
> mask as well as for the online cpu mask.
>
> Signed-off-by: Clément Léger <cleger@rivosinc.com>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> ---
> arch/riscv/include/asm/sbi.h | 17 +++++++++++
> arch/riscv/kernel/sbi.c | 57 ++++++++++++++++++++++++++++++++++++
> 2 files changed, 74 insertions(+)
>
> diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
> index 7ec249fea880..c8eab315c80e 100644
> --- a/arch/riscv/include/asm/sbi.h
> +++ b/arch/riscv/include/asm/sbi.h
> @@ -503,6 +503,23 @@ int sbi_remote_hfence_vvma_asid(const struct cpumask *cpu_mask,
> unsigned long asid);
> long sbi_probe_extension(int ext);
>
> +int sbi_fwft_set(u32 feature, unsigned long value, unsigned long flags);
> +int sbi_fwft_local_set_cpumask(const cpumask_t *mask, u32 feature,
> + unsigned long value, unsigned long flags);
I'm confused by the naming that includes 'local' and 'cpumask' together
and...
> +/**
> + * sbi_fwft_local_set() - Set a feature on all online cpus
> + * @feature: The feature to be set
> + * @value: The feature value to be set
> + * @flags: FWFT feature set flags
> + *
> + * Return: 0 on success, appropriate linux error code otherwise.
> + */
> +static inline int sbi_fwft_local_set(u32 feature, unsigned long value,
> + unsigned long flags)
> +{
> + return sbi_fwft_local_set_cpumask(cpu_online_mask, feature, value, flags);
...that something named with just 'local' is applied to all online cpus.
I've always considered 'local' functions to only affect the calling cpu.
Thanks,
drew
next prev parent reply other threads:[~2025-04-24 11:00 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-17 12:19 [PATCH v5 00/13] riscv: add SBI FWFT misaligned exception delegation support Clément Léger
2025-04-17 12:19 ` [PATCH v5 01/13] riscv: sbi: add Firmware Feature (FWFT) SBI extensions definitions Clément Léger
2025-04-17 12:19 ` [PATCH v5 02/13] riscv: sbi: add new SBI error mappings Clément Léger
2025-04-17 12:19 ` [PATCH v5 03/13] riscv: sbi: add FWFT extension interface Clément Léger
2025-04-24 11:00 ` Andrew Jones [this message]
2025-04-24 12:32 ` Clément Léger
2025-04-24 12:57 ` Andrew Jones
2025-04-17 12:19 ` [PATCH v5 04/13] riscv: sbi: add SBI FWFT extension calls Clément Léger
2025-04-24 11:06 ` Andrew Jones
2025-04-24 12:35 ` Clément Léger
2025-04-24 12:59 ` Andrew Jones
2025-04-24 13:04 ` Clément Léger
2025-04-17 12:19 ` [PATCH v5 05/13] riscv: misaligned: request misaligned exception from SBI Clément Léger
2025-04-24 11:14 ` Andrew Jones
2025-04-17 12:19 ` [PATCH v5 06/13] riscv: misaligned: use on_each_cpu() for scalar misaligned access probing Clément Léger
2025-04-17 12:19 ` [PATCH v5 07/13] riscv: misaligned: use correct CONFIG_ ifdef for misaligned_access_speed Clément Léger
2025-04-17 12:19 ` [PATCH v5 08/13] riscv: misaligned: move emulated access uniformity check in a function Clément Léger
2025-04-17 12:19 ` [PATCH v5 09/13] riscv: misaligned: add a function to check misalign trap delegability Clément Léger
2025-04-17 12:19 ` [PATCH v5 10/13] RISC-V: KVM: add SBI extension init()/deinit() functions Clément Léger
2025-04-17 12:19 ` [PATCH v5 11/13] RISC-V: KVM: add SBI extension reset callback Clément Léger
2025-04-17 12:19 ` [PATCH v5 12/13] RISC-V: KVM: add support for FWFT SBI extension Clément Léger
2025-04-17 12:20 ` [PATCH v5 13/13] RISC-V: KVM: add support for SBI_FWFT_MISALIGNED_DELEG Clément Léger
2025-04-24 11:34 ` Andrew Jones
2025-04-24 12:37 ` Clément Léger
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