[PATCH] x86/pmu_pebs: Initalize and enable PMU interrupt (PMI_VECTOR)

[Dapeng Mi <dapeng1.mi@linux.intel.com>]

PMU interrupt is not correctly initialized and enabled in pmu_pebs test.
It leads to the APIC_LVTPC mask bit is never cleared after first PMI and
all subsequential PEBS PMIs are suppressed.

Although it doesn't impact pmu_pebs test results since current pmu_pebs
test checks PEBS records by polling instead of PMI driving, it's still an
incorrect behavior and could cause some unexpected false positives.

Thus initialize and enable PMU interrupt and ensure PEBS PMI can be
generated and correctly processed.

Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
---
 x86/pmu_pebs.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/x86/pmu_pebs.c b/x86/pmu_pebs.c
index 6396d51c..6e73fc34 100644
--- a/x86/pmu_pebs.c
+++ b/x86/pmu_pebs.c
@@ -417,9 +417,11 @@ int main(int ac, char **av)
 	printf("PEBS Fixed counters: %d\n", pmu.nr_fixed_counters);
 	printf("PEBS baseline (Adaptive PEBS): %d\n", has_baseline);
 
+	apic_write(APIC_LVTPC, PMI_VECTOR);
 	handle_irq(PMI_VECTOR, cnt_overflow);
 	alloc_buffers();
 
+	sti();
 	for (i = 0; i < ARRAY_SIZE(counter_start_values); i++) {
 		ctr_start_val = counter_start_values[i];
 		check_pebs_counters(0, false);
@@ -441,6 +443,7 @@ int main(int ac, char **av)
 			report_prefix_pop();
 		}
 	}
+	cli();
 
 	free_buffers();
 

base-commit: abdc5d02a7796a55802509ac9bb704c721f2a5f6
-- 
2.40.1