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* [PATCH] x86/pmu_pebs: Initalize and enable PMU interrupt (PMI_VECTOR)
@ 2025-04-24  5:22 Dapeng Mi
  2025-06-10 19:42 ` Sean Christopherson
  0 siblings, 1 reply; 2+ messages in thread
From: Dapeng Mi @ 2025-04-24  5:22 UTC (permalink / raw)
  To: Sean Christopherson, Paolo Bonzini
  Cc: kvm, linux-kernel, Jim Mattson, Mingwei Zhang, Zide Chen,
	Das Sandipan, Shukla Manali, Dapeng Mi, Dapeng Mi

PMU interrupt is not correctly initialized and enabled in pmu_pebs test.
It leads to the APIC_LVTPC mask bit is never cleared after first PMI and
all subsequential PEBS PMIs are suppressed.

Although it doesn't impact pmu_pebs test results since current pmu_pebs
test checks PEBS records by polling instead of PMI driving, it's still an
incorrect behavior and could cause some unexpected false positives.

Thus initialize and enable PMU interrupt and ensure PEBS PMI can be
generated and correctly processed.

Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
---
 x86/pmu_pebs.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/x86/pmu_pebs.c b/x86/pmu_pebs.c
index 6396d51c..6e73fc34 100644
--- a/x86/pmu_pebs.c
+++ b/x86/pmu_pebs.c
@@ -417,9 +417,11 @@ int main(int ac, char **av)
 	printf("PEBS Fixed counters: %d\n", pmu.nr_fixed_counters);
 	printf("PEBS baseline (Adaptive PEBS): %d\n", has_baseline);
 
+	apic_write(APIC_LVTPC, PMI_VECTOR);
 	handle_irq(PMI_VECTOR, cnt_overflow);
 	alloc_buffers();
 
+	sti();
 	for (i = 0; i < ARRAY_SIZE(counter_start_values); i++) {
 		ctr_start_val = counter_start_values[i];
 		check_pebs_counters(0, false);
@@ -441,6 +443,7 @@ int main(int ac, char **av)
 			report_prefix_pop();
 		}
 	}
+	cli();
 
 	free_buffers();
 

base-commit: abdc5d02a7796a55802509ac9bb704c721f2a5f6
-- 
2.40.1


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH] x86/pmu_pebs: Initalize and enable PMU interrupt (PMI_VECTOR)
  2025-04-24  5:22 [PATCH] x86/pmu_pebs: Initalize and enable PMU interrupt (PMI_VECTOR) Dapeng Mi
@ 2025-06-10 19:42 ` Sean Christopherson
  0 siblings, 0 replies; 2+ messages in thread
From: Sean Christopherson @ 2025-06-10 19:42 UTC (permalink / raw)
  To: Sean Christopherson, Paolo Bonzini, Dapeng Mi
  Cc: kvm, linux-kernel, Jim Mattson, Mingwei Zhang, Zide Chen,
	Das Sandipan, Shukla Manali, Dapeng Mi

On Thu, 24 Apr 2025 05:22:01 +0000, Dapeng Mi wrote:
> PMU interrupt is not correctly initialized and enabled in pmu_pebs test.
> It leads to the APIC_LVTPC mask bit is never cleared after first PMI and
> all subsequential PEBS PMIs are suppressed.
> 
> Although it doesn't impact pmu_pebs test results since current pmu_pebs
> test checks PEBS records by polling instead of PMI driving, it's still an
> incorrect behavior and could cause some unexpected false positives.
> 
> [...]

Applied to kvm-x86 next, thanks!

[1/1] x86/pmu_pebs: Initalize and enable PMU interrupt (PMI_VECTOR)
      https://github.com/kvm-x86/kvm-unit-tests/commit/389dfda487f9

--
https://github.com/kvm-x86/kvm-unit-tests/tree/next

^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2025-06-10 19:42 UTC | newest]

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2025-04-24  5:22 [PATCH] x86/pmu_pebs: Initalize and enable PMU interrupt (PMI_VECTOR) Dapeng Mi
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