From: "Clément Léger" <cleger@rivosinc.com>
To: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Anup Patel <anup@brainfault.org>,
Atish Patra <atishp@atishpatra.org>,
Shuah Khan <shuah@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-doc@vger.kernel.org, kvm@vger.kernel.org,
kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org
Cc: "Clément Léger" <cleger@rivosinc.com>,
"Samuel Holland" <samuel.holland@sifive.com>,
"Andrew Jones" <ajones@ventanamicro.com>,
"Deepak Gupta" <debug@rivosinc.com>
Subject: [PATCH v6 08/14] riscv: misaligned: use correct CONFIG_ ifdef for misaligned_access_speed
Date: Thu, 24 Apr 2025 19:31:55 +0200 [thread overview]
Message-ID: <20250424173204.1948385-9-cleger@rivosinc.com> (raw)
In-Reply-To: <20250424173204.1948385-1-cleger@rivosinc.com>
misaligned_access_speed is defined under CONFIG_RISCV_SCALAR_MISALIGNED
but was used under CONFIG_RISCV_PROBE_UNALIGNED_ACCESS. Fix that by
using the correct config option.
Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
arch/riscv/kernel/traps_misaligned.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/kernel/traps_misaligned.c b/arch/riscv/kernel/traps_misaligned.c
index e1fe39cc6709..e02e9b4b0fc5 100644
--- a/arch/riscv/kernel/traps_misaligned.c
+++ b/arch/riscv/kernel/traps_misaligned.c
@@ -362,7 +362,7 @@ static int handle_scalar_misaligned_load(struct pt_regs *regs)
perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, addr);
-#ifdef CONFIG_RISCV_PROBE_UNALIGNED_ACCESS
+#ifdef CONFIG_RISCV_SCALAR_MISALIGNED
*this_cpu_ptr(&misaligned_access_speed) = RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED;
#endif
--
2.49.0
next prev parent reply other threads:[~2025-04-24 17:34 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-24 17:31 [PATCH v6 00/14] riscv: add SBI FWFT misaligned exception delegation support Clément Léger
2025-04-24 17:31 ` [PATCH v6 01/14] riscv: sbi: add Firmware Feature (FWFT) SBI extensions definitions Clément Léger
2025-05-08 20:17 ` Atish Patra
2025-04-24 17:31 ` [PATCH v6 02/14] riscv: sbi: remove useless parenthesis Clément Léger
2025-04-25 7:46 ` Andrew Jones
2025-05-08 20:18 ` Atish Patra
2025-04-24 17:31 ` [PATCH v6 03/14] riscv: sbi: add new SBI error mappings Clément Léger
2025-05-08 20:18 ` Atish Patra
2025-04-24 17:31 ` [PATCH v6 04/14] riscv: sbi: add FWFT extension interface Clément Léger
2025-05-08 22:52 ` Atish Patra
2025-05-09 0:18 ` Atish Patra
2025-05-12 8:14 ` Clément Léger
2025-05-12 18:00 ` Atish Patra
2025-04-24 17:31 ` [PATCH v6 05/14] riscv: sbi: add SBI FWFT extension calls Clément Léger
2025-05-08 23:01 ` Atish Patra
2025-04-24 17:31 ` [PATCH v6 06/14] riscv: misaligned: request misaligned exception from SBI Clément Léger
2025-04-24 17:31 ` [PATCH v6 07/14] riscv: misaligned: use on_each_cpu() for scalar misaligned access probing Clément Léger
2025-04-24 17:31 ` Clément Léger [this message]
2025-04-24 17:31 ` [PATCH v6 09/14] riscv: misaligned: move emulated access uniformity check in a function Clément Léger
2025-04-24 17:31 ` [PATCH v6 10/14] riscv: misaligned: add a function to check misalign trap delegability Clément Léger
2025-04-24 18:18 ` ALOK TIWARI
2025-04-24 17:31 ` [PATCH v6 11/14] RISC-V: KVM: add SBI extension init()/deinit() functions Clément Léger
2025-05-08 17:27 ` Palmer Dabbelt
2025-05-09 3:20 ` Anup Patel
2025-05-09 0:26 ` Atish Patra
2025-04-24 17:31 ` [PATCH v6 12/14] RISC-V: KVM: add SBI extension reset callback Clément Léger
2025-05-09 0:28 ` Atish Patra
2025-04-24 17:32 ` [PATCH v6 13/14] RISC-V: KVM: add support for FWFT SBI extension Clément Léger
2025-05-09 18:49 ` Atish Patra
2025-04-24 17:32 ` [PATCH v6 14/14] RISC-V: KVM: add support for SBI_FWFT_MISALIGNED_DELEG Clément Léger
2025-05-09 18:09 ` Atish Patra
2025-05-12 8:28 ` Clément Léger
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250424173204.1948385-9-cleger@rivosinc.com \
--to=cleger@rivosinc.com \
--cc=ajones@ventanamicro.com \
--cc=anup@brainfault.org \
--cc=atishp@atishpatra.org \
--cc=corbet@lwn.net \
--cc=debug@rivosinc.com \
--cc=kvm-riscv@lists.infradead.org \
--cc=kvm@vger.kernel.org \
--cc=linux-doc@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-kselftest@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=samuel.holland@sifive.com \
--cc=shuah@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox