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From: Marc Zyngier <maz@kernel.org>
To: kvmarm@lists.linux.dev, kvm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Cc: Joey Gouly <joey.gouly@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Oliver Upton <oliver.upton@linux.dev>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Fuad Tabba <tabba@google.com>, Will Deacon <will@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Ben Horgan <ben.horgan@arm.com>
Subject: [PATCH v4 18/43] KVM: arm64: Handle trapping of FEAT_LS64* instructions
Date: Tue,  6 May 2025 17:43:23 +0100	[thread overview]
Message-ID: <20250506164348.346001-19-maz@kernel.org> (raw)
In-Reply-To: <20250506164348.346001-1-maz@kernel.org>

We generally don't expect FEAT_LS64* instructions to trap, unless
they are trapped by a guest hypervisor.

Otherwise, this is just the guest playing tricks on us by using
an instruction that isn't advertised, which we handle with a well
deserved UNDEF.

Reviewed-by: Joey Gouly <joey.gouly@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 arch/arm64/kvm/handle_exit.c | 56 ++++++++++++++++++++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/arch/arm64/kvm/handle_exit.c b/arch/arm64/kvm/handle_exit.c
index b73dc26bc44b4..ff75695fb8c96 100644
--- a/arch/arm64/kvm/handle_exit.c
+++ b/arch/arm64/kvm/handle_exit.c
@@ -298,6 +298,61 @@ static int handle_svc(struct kvm_vcpu *vcpu)
 	return 1;
 }
 
+static int handle_other(struct kvm_vcpu *vcpu)
+{
+	bool is_l2 = vcpu_has_nv(vcpu) && !is_hyp_ctxt(vcpu);
+	u64 hcrx = __vcpu_sys_reg(vcpu, HCRX_EL2);
+	u64 esr = kvm_vcpu_get_esr(vcpu);
+	u64 iss = ESR_ELx_ISS(esr);
+	struct kvm *kvm = vcpu->kvm;
+	bool allowed, fwd = false;
+
+	/*
+	 * We only trap for two reasons:
+	 *
+	 * - the feature is disabled, and the only outcome is to
+	 *   generate an UNDEF.
+	 *
+	 * - the feature is enabled, but a NV guest wants to trap the
+	 *   feature used by its L2 guest. We forward the exception in
+	 *   this case.
+	 *
+	 * What we don't expect is to end-up here if the guest is
+	 * expected be be able to directly use the feature, hence the
+	 * WARN_ON below.
+	 */
+	switch (iss) {
+	case ESR_ELx_ISS_OTHER_ST64BV:
+		allowed = kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64_V);
+		if (is_l2)
+			fwd = !(hcrx & HCRX_EL2_EnASR);
+		break;
+	case ESR_ELx_ISS_OTHER_ST64BV0:
+		allowed = kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64_ACCDATA);
+		if (is_l2)
+			fwd = !(hcrx & HCRX_EL2_EnAS0);
+		break;
+	case ESR_ELx_ISS_OTHER_LDST64B:
+		allowed = kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64);
+		if (is_l2)
+			fwd = !(hcrx & HCRX_EL2_EnALS);
+		break;
+	default:
+		/* Clearly, we're missing something. */
+		WARN_ON_ONCE(1);
+		allowed = false;
+	}
+
+	WARN_ON_ONCE(allowed && !fwd);
+
+	if (allowed && fwd)
+		kvm_inject_nested_sync(vcpu, esr);
+	else
+		kvm_inject_undefined(vcpu);
+
+	return 1;
+}
+
 static exit_handle_fn arm_exit_handlers[] = {
 	[0 ... ESR_ELx_EC_MAX]	= kvm_handle_unknown_ec,
 	[ESR_ELx_EC_WFx]	= kvm_handle_wfx,
@@ -307,6 +362,7 @@ static exit_handle_fn arm_exit_handlers[] = {
 	[ESR_ELx_EC_CP14_LS]	= kvm_handle_cp14_load_store,
 	[ESR_ELx_EC_CP10_ID]	= kvm_handle_cp10_id,
 	[ESR_ELx_EC_CP14_64]	= kvm_handle_cp14_64,
+	[ESR_ELx_EC_OTHER]	= handle_other,
 	[ESR_ELx_EC_HVC32]	= handle_hvc,
 	[ESR_ELx_EC_SMC32]	= handle_smc,
 	[ESR_ELx_EC_HVC64]	= handle_hvc,
-- 
2.39.2


  parent reply	other threads:[~2025-05-06 16:44 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-06 16:43 [PATCH v4 00/43] KVM: arm64: Revamp Fine Grained Trap handling Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 01/43] arm64: sysreg: Add ID_AA64ISAR1_EL1.LS64 encoding for FEAT_LS64WB Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 02/43] arm64: sysreg: Update ID_AA64MMFR4_EL1 description Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 03/43] arm64: sysreg: Add layout for HCR_EL2 Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 04/43] arm64: sysreg: Replace HFGxTR_EL2 with HFG{R,W}TR_EL2 Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 05/43] arm64: sysreg: Update ID_AA64PFR0_EL1 description Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 06/43] arm64: sysreg: Update PMSIDR_EL1 description Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 07/43] arm64: sysreg: Update TRBIDR_EL1 description Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 08/43] arm64: sysreg: Update CPACR_EL1 description Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 09/43] arm64: sysreg: Add registers trapped by HFG{R,W}TR2_EL2 Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 10/43] arm64: sysreg: Add registers trapped by HDFG{R,W}TR2_EL2 Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 11/43] arm64: sysreg: Add system instructions trapped by HFGIRT2_EL2 Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 12/43] arm64: Remove duplicated sysreg encodings Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 13/43] arm64: tools: Resync sysreg.h Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 14/43] arm64: Add syndrome information for trapped LD64B/ST64B{,V,V0} Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 15/43] arm64: Add FEAT_FGT2 capability Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 16/43] KVM: arm64: Tighten handling of unknown FGT groups Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 17/43] KVM: arm64: Simplify handling of negative FGT bits Marc Zyngier
2025-05-06 16:43 ` Marc Zyngier [this message]
2025-05-06 16:43 ` [PATCH v4 19/43] KVM: arm64: Restrict ACCDATA_EL1 undef to FEAT_LS64_ACCDATA being disabled Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 20/43] KVM: arm64: Don't treat HCRX_EL2 as a FGT register Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 21/43] KVM: arm64: Plug FEAT_GCS handling Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 22/43] KVM: arm64: Compute FGT masks from KVM's own FGT tables Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 23/43] KVM: arm64: Add description of FGT bits leading to EC!=0x18 Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 24/43] KVM: arm64: Use computed masks as sanitisers for FGT registers Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 25/43] KVM: arm64: Unconditionally configure fine-grain traps Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 26/43] KVM: arm64: Propagate FGT masks to the nVHE hypervisor Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 27/43] KVM: arm64: Use computed FGT masks to setup FGT registers Marc Zyngier
2025-05-08 13:49   ` Joey Gouly
2025-05-06 16:43 ` [PATCH v4 28/43] KVM: arm64: Remove hand-crafted masks for " Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 29/43] KVM: arm64: Use KVM-specific HCRX_EL2 RES0 mask Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 30/43] KVM: arm64: Handle PSB CSYNC traps Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 31/43] KVM: arm64: Switch to table-driven FGU configuration Marc Zyngier
2025-05-08 15:58   ` Joey Gouly
2025-05-10  9:56     ` Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 32/43] KVM: arm64: Validate FGT register descriptions against RES0 masks Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 33/43] KVM: arm64: Use FGT feature maps to drive RES0 bits Marc Zyngier
2025-05-15 15:24   ` Joey Gouly
2025-05-06 16:43 ` [PATCH v4 34/43] KVM: arm64: Allow kvm_has_feat() to take variable arguments Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 35/43] KVM: arm64: Use HCRX_EL2 feature map to drive fixed-value bits Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 36/43] KVM: arm64: Use HCR_EL2 " Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 37/43] KVM: arm64: Add FEAT_FGT2 registers to the VNCR page Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 38/43] KVM: arm64: Add sanitisation for FEAT_FGT2 registers Marc Zyngier
2025-05-15 16:04   ` Joey Gouly
2025-05-06 16:43 ` [PATCH v4 39/43] KVM: arm64: Add trap routing " Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 40/43] KVM: arm64: Add context-switch " Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 41/43] KVM: arm64: Allow sysreg ranges for FGT descriptors Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 42/43] KVM: arm64: Add FGT descriptors for FEAT_FGT2 Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 43/43] KVM: arm64: Handle TSB CSYNC traps Marc Zyngier
2025-05-19 11:59 ` [PATCH v4 00/43] KVM: arm64: Revamp Fine Grained Trap handling Marc Zyngier

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