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From: Atish Patra <atishp@rivosinc.com>
To: Anup Patel <anup@brainfault.org>, Will Deacon <will@kernel.org>,
	 Mark Rutland <mark.rutland@arm.com>,
	 Paul Walmsley <paul.walmsley@sifive.com>,
	 Palmer Dabbelt <palmer@dabbelt.com>,
	 Mayuresh Chitale <mchitale@ventanamicro.com>
Cc: linux-riscv@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	 linux-kernel@vger.kernel.org,
	Palmer Dabbelt <palmer@rivosinc.com>,
	 kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
	 Atish Patra <atishp@rivosinc.com>
Subject: [PATCH v3 8/9] RISC-V: KVM: Implement get event info function
Date: Thu, 22 May 2025 12:03:42 -0700	[thread overview]
Message-ID: <20250522-pmu_event_info-v3-8-f7bba7fd9cfe@rivosinc.com> (raw)
In-Reply-To: <20250522-pmu_event_info-v3-0-f7bba7fd9cfe@rivosinc.com>

The new get_event_info funciton allows the guest to query the presence
of multiple events with single SBI call. Currently, the perf driver
in linux guest invokes it for all the standard SBI PMU events. Support
the SBI function implementation in KVM as well.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
---
 arch/riscv/include/asm/kvm_vcpu_pmu.h |  3 ++
 arch/riscv/kvm/vcpu_pmu.c             | 66 +++++++++++++++++++++++++++++++++++
 arch/riscv/kvm/vcpu_sbi_pmu.c         |  3 ++
 3 files changed, 72 insertions(+)

diff --git a/arch/riscv/include/asm/kvm_vcpu_pmu.h b/arch/riscv/include/asm/kvm_vcpu_pmu.h
index 1d85b6617508..9a930afc8f57 100644
--- a/arch/riscv/include/asm/kvm_vcpu_pmu.h
+++ b/arch/riscv/include/asm/kvm_vcpu_pmu.h
@@ -98,6 +98,9 @@ void kvm_riscv_vcpu_pmu_init(struct kvm_vcpu *vcpu);
 int kvm_riscv_vcpu_pmu_snapshot_set_shmem(struct kvm_vcpu *vcpu, unsigned long saddr_low,
 				      unsigned long saddr_high, unsigned long flags,
 				      struct kvm_vcpu_sbi_return *retdata);
+int kvm_riscv_vcpu_pmu_event_info(struct kvm_vcpu *vcpu, unsigned long saddr_low,
+				  unsigned long saddr_high, unsigned long num_events,
+				  unsigned long flags, struct kvm_vcpu_sbi_return *retdata);
 void kvm_riscv_vcpu_pmu_deinit(struct kvm_vcpu *vcpu);
 void kvm_riscv_vcpu_pmu_reset(struct kvm_vcpu *vcpu);
 
diff --git a/arch/riscv/kvm/vcpu_pmu.c b/arch/riscv/kvm/vcpu_pmu.c
index 163bd4403fd0..70a6bdfc42f5 100644
--- a/arch/riscv/kvm/vcpu_pmu.c
+++ b/arch/riscv/kvm/vcpu_pmu.c
@@ -453,6 +453,72 @@ int kvm_riscv_vcpu_pmu_snapshot_set_shmem(struct kvm_vcpu *vcpu, unsigned long s
 	return 0;
 }
 
+int kvm_riscv_vcpu_pmu_event_info(struct kvm_vcpu *vcpu, unsigned long saddr_low,
+				  unsigned long saddr_high, unsigned long num_events,
+				  unsigned long flags, struct kvm_vcpu_sbi_return *retdata)
+{
+	struct riscv_pmu_event_info *einfo;
+	int shmem_size = num_events * sizeof(*einfo);
+	gpa_t shmem;
+	u32 eidx, etype;
+	u64 econfig;
+	int ret;
+
+	if (flags != 0 || (saddr_low & (SZ_16 - 1))) {
+		ret = SBI_ERR_INVALID_PARAM;
+		goto out;
+	}
+
+	shmem = saddr_low;
+	if (saddr_high != 0) {
+		if (IS_ENABLED(CONFIG_32BIT)) {
+			shmem |= ((gpa_t)saddr_high << 32);
+		} else {
+			ret = SBI_ERR_INVALID_ADDRESS;
+			goto out;
+		}
+	}
+
+	if (kvm_vcpu_validate_gpa_range(vcpu, shmem, shmem_size, true)) {
+		ret = SBI_ERR_INVALID_ADDRESS;
+		goto out;
+	}
+
+	einfo = kzalloc(shmem_size, GFP_KERNEL);
+	if (!einfo)
+		return -ENOMEM;
+
+	ret = kvm_vcpu_read_guest(vcpu, shmem, einfo, shmem_size);
+	if (ret) {
+		ret = SBI_ERR_FAILURE;
+		goto free_mem;
+	}
+
+	for (int i = 0; i < num_events; i++) {
+		eidx = einfo[i].event_idx;
+		etype = kvm_pmu_get_perf_event_type(eidx);
+		econfig = kvm_pmu_get_perf_event_config(eidx, einfo[i].event_data);
+		ret = riscv_pmu_get_event_info(etype, econfig, NULL);
+		if (ret > 0)
+			einfo[i].output = 1;
+		else
+			einfo[i].output = 0;
+	}
+
+	kvm_vcpu_write_guest(vcpu, shmem, einfo, shmem_size);
+	if (ret) {
+		ret = SBI_ERR_FAILURE;
+		goto free_mem;
+	}
+
+free_mem:
+	kfree(einfo);
+out:
+	retdata->err_val = ret;
+
+	return 0;
+}
+
 int kvm_riscv_vcpu_pmu_num_ctrs(struct kvm_vcpu *vcpu,
 				struct kvm_vcpu_sbi_return *retdata)
 {
diff --git a/arch/riscv/kvm/vcpu_sbi_pmu.c b/arch/riscv/kvm/vcpu_sbi_pmu.c
index e4be34e03e83..a020d979d179 100644
--- a/arch/riscv/kvm/vcpu_sbi_pmu.c
+++ b/arch/riscv/kvm/vcpu_sbi_pmu.c
@@ -73,6 +73,9 @@ static int kvm_sbi_ext_pmu_handler(struct kvm_vcpu *vcpu, struct kvm_run *run,
 	case SBI_EXT_PMU_SNAPSHOT_SET_SHMEM:
 		ret = kvm_riscv_vcpu_pmu_snapshot_set_shmem(vcpu, cp->a0, cp->a1, cp->a2, retdata);
 		break;
+	case SBI_EXT_PMU_EVENT_GET_INFO:
+		ret = kvm_riscv_vcpu_pmu_event_info(vcpu, cp->a0, cp->a1, cp->a2, cp->a3, retdata);
+		break;
 	default:
 		retdata->err_val = SBI_ERR_NOT_SUPPORTED;
 	}

-- 
2.43.0


  parent reply	other threads:[~2025-05-22 19:03 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-22 19:03 [PATCH v3 0/9] Add SBI v3.0 PMU enhancements Atish Patra
2025-05-22 19:03 ` [PATCH v3 1/9] drivers/perf: riscv: Add SBI v3.0 flag Atish Patra
2025-07-17 15:11   ` Anup Patel
2025-05-22 19:03 ` [PATCH v3 2/9] drivers/perf: riscv: Add raw event v2 support Atish Patra
2025-07-17 15:17   ` Anup Patel
2025-05-22 19:03 ` [PATCH v3 3/9] RISC-V: KVM: Add support for Raw event v2 Atish Patra
2025-07-17 15:18   ` Anup Patel
2025-05-22 19:03 ` [PATCH v3 4/9] drivers/perf: riscv: Implement PMU event info function Atish Patra
2025-07-18  4:32   ` Anup Patel
2025-05-22 19:03 ` [PATCH v3 5/9] drivers/perf: riscv: Export " Atish Patra
2025-07-18  4:39   ` Anup Patel
2025-05-22 19:03 ` [PATCH v3 6/9] KVM: Add a helper function to validate vcpu gpa range Atish Patra
2025-07-17 16:04   ` Anup Patel
2025-07-17 16:07   ` Anup Patel
2025-05-22 19:03 ` [PATCH v3 7/9] RISC-V: KVM: Use the new gpa range validate helper function Atish Patra
2025-07-18  4:40   ` Anup Patel
2025-05-22 19:03 ` Atish Patra [this message]
2025-07-18  5:44   ` [PATCH v3 8/9] RISC-V: KVM: Implement get event info function Anup Patel
2025-05-22 19:03 ` [PATCH v3 9/9] RISC-V: KVM: Upgrade the supported SBI version to 3.0 Atish Patra
2025-05-23 13:31   ` Radim Krčmář
2025-05-23 17:16     ` Atish Patra
2025-05-26  9:00       ` Radim Krčmář
2025-05-26 11:13         ` Andrew Jones
2025-05-28 14:16           ` Atish Patra
2025-05-28 15:09             ` Andrew Jones
2025-05-28 19:21               ` Atish Patra
2025-05-29  1:17                 ` Atish Patra
2025-05-29 10:24                 ` Radim Krčmář
2025-05-29 18:44                   ` Atish Patra
2025-05-29 19:14                     ` Andrew Jones
2025-05-30 11:45                       ` Anup Patel
2025-05-30 11:09                     ` Radim Krčmář
2025-05-30 19:29                       ` Atish Patra
2025-06-03 11:40                         ` Radim Krčmář
2025-06-04  0:29                           ` Atish Patra
2025-07-18  4:44   ` Anup Patel

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