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Tue, 24 Jun 2025 06:45:20 -0700 (PDT) Date: Tue, 24 Jun 2025 15:45:19 +0200 From: Andrew Jones To: zhouquan@iscas.ac.cn Cc: anup@brainfault.org, atishp@atishpatra.org, paul.walmsley@sifive.com, palmer@dabbelt.com, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org Subject: Re: [PATCH 1/5] RISC-V: KVM: Provide UAPI for Zicbop block size Message-ID: <20250624-c01c528dd9ec524ed3f5e17e@orel> References: <553bacc4f66e815975bb8ee0e4696397407b0a82.1750164414.git.zhouquan@iscas.ac.cn> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <553bacc4f66e815975bb8ee0e4696397407b0a82.1750164414.git.zhouquan@iscas.ac.cn> On Tue, Jun 17, 2025 at 09:10:22PM +0800, zhouquan@iscas.ac.cn wrote: > From: Quan Zhou > > We're about to allow guests to use the Zicbop extension. > KVM userspace needs to know the cache block size in order to > properly advertise it to the guest. Provide a virtual config > register for userspace to get it with the GET_ONE_REG API, but > setting it cannot be supported, so disallow SET_ONE_REG. > > Signed-off-by: Quan Zhou > --- > arch/riscv/include/uapi/asm/kvm.h | 1 + > arch/riscv/kvm/vcpu_onereg.c | 11 +++++++++++ > 2 files changed, 12 insertions(+) > > diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h > index 5f59fd226cc5..0863ca178066 100644 > --- a/arch/riscv/include/uapi/asm/kvm.h > +++ b/arch/riscv/include/uapi/asm/kvm.h > @@ -55,6 +55,7 @@ struct kvm_riscv_config { > unsigned long mimpid; > unsigned long zicboz_block_size; > unsigned long satp_mode; > + unsigned long zicbop_block_size; > }; > > /* CORE registers for KVM_GET_ONE_REG and KVM_SET_ONE_REG */ > diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c > index 2e1b646f0d61..b08a22eaa7a7 100644 > --- a/arch/riscv/kvm/vcpu_onereg.c > +++ b/arch/riscv/kvm/vcpu_onereg.c > @@ -256,6 +256,11 @@ static int kvm_riscv_vcpu_get_reg_config(struct kvm_vcpu *vcpu, > return -ENOENT; > reg_val = riscv_cboz_block_size; > break; > + case KVM_REG_RISCV_CONFIG_REG(zicbop_block_size): > + if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOP)) I realize this is the same as what we do for zicbom and zicboz, but I think we should actually check riscv_isa_extension_available(NULL, ZICBOP) instead. The reason is that we otherwise create an ioctl order dependency on the VMM. I suggest adding a patch to this series, which would come first, to change zicbom and zicboz block size registers to depend on the host, not the guest, isa. The patch should also change the reg list filtering in copy_config_reg_indices() to use the host isa. And then this patch should change to also use the host isa. Also, this patch is missing the reg list filtering for zicbop, so it should be added too. Thanks, drew > + return -ENOENT; > + reg_val = riscv_cbop_block_size; > + break; > case KVM_REG_RISCV_CONFIG_REG(mvendorid): > reg_val = vcpu->arch.mvendorid; > break; > @@ -347,6 +352,12 @@ static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu, > if (reg_val != riscv_cboz_block_size) > return -EINVAL; > break; > + case KVM_REG_RISCV_CONFIG_REG(zicbop_block_size): > + if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOP)) > + return -ENOENT; > + if (reg_val != riscv_cbop_block_size) > + return -EINVAL; > + break; > case KVM_REG_RISCV_CONFIG_REG(mvendorid): > if (reg_val == vcpu->arch.mvendorid) > break; > -- > 2.34.1 >