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From: Andrew Jones <andrew.jones@linux.dev>
To: Jesse Taube <jesse@rivosinc.com>
Cc: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
	linux-kselftest@vger.kernel.org,
	"Clément Léger" <cleger@rivosinc.com>,
	"Charlie Jenkins" <charlie@rivosinc.com>
Subject: Re: [kvm-unit-tests PATCH] riscv: Use norvc over arch, -c
Date: Fri, 4 Jul 2025 10:26:20 +0200	[thread overview]
Message-ID: <20250704-d34a50590233beaf67e66044@orel> (raw)
In-Reply-To: <20250704015837.1700249-1-jesse@rivosinc.com>

On Thu, Jul 03, 2025 at 06:58:37PM -0700, Jesse Taube wrote:
> The Linux kernel main tree uses "norvc" over
> "arch, -c" change to match this.
> 
> GCC 15 started to add _zca_zcd to the assembler flags causing a bug
> which made "arch, -c" generate a compressed instruction.
> 
> Link: https://sourceware.org/bugzilla/show_bug.cgi?id=33128
> Cc: Clément Léger <cleger@rivosinc.com>
> Signed-off-by: Jesse Taube <jesse@rivosinc.com>
> ---
>  riscv/isa-dbltrp.c | 2 +-
>  riscv/sbi-dbtr.c   | 2 +-
>  riscv/sbi-fwft.c   | 2 +-
>  3 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/riscv/isa-dbltrp.c b/riscv/isa-dbltrp.c
> index b7e21589..af12860c 100644
> --- a/riscv/isa-dbltrp.c
> +++ b/riscv/isa-dbltrp.c
> @@ -26,7 +26,7 @@ do {										\
>  	unsigned long value = 0;						\
>  	asm volatile(								\
>  	"	.option push\n"							\
> -	"	.option arch,-c\n"						\
> +	"	.option norvc\n"						\
>  	"	sw %0, 0(%1)\n"							\
>  	"	.option pop\n"							\
>  	: : "r" (value), "r" (ptr) : "memory");					\
> diff --git a/riscv/sbi-dbtr.c b/riscv/sbi-dbtr.c
> index c4ccd81d..129f79b8 100644
> --- a/riscv/sbi-dbtr.c
> +++ b/riscv/sbi-dbtr.c
> @@ -134,7 +134,7 @@ static __attribute__((naked)) void exec_call(void)
>  {
>  	/* skip over nop when triggered instead of ret. */
>  	asm volatile (".option push\n"
> -		      ".option arch, -c\n"
> +		      ".option norvc\n"
>  		      "nop\n"
>  		      "ret\n"
>  		      ".option pop\n");
> diff --git a/riscv/sbi-fwft.c b/riscv/sbi-fwft.c
> index 8920bcb5..fda7eb52 100644
> --- a/riscv/sbi-fwft.c
> +++ b/riscv/sbi-fwft.c
> @@ -174,7 +174,7 @@ static void fwft_check_misaligned_exc_deleg(void)
>  		 * Disable compression so the lw takes exactly 4 bytes and thus
>  		 * can be skipped reliably from the exception handler.
>  		 */
> -		".option arch,-c\n"
> +		".option norvc\n"
>  		"lw %[val], 1(%[val_addr])\n"
>  		".option pop\n"
>  		: [val] "+r" (ret.value)
> -- 
> 2.43.0
> 
> 
> -- 
> kvm-riscv mailing list
> kvm-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/kvm-riscv

Merged. Thanks

      reply	other threads:[~2025-07-04  8:26 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-04  1:58 [kvm-unit-tests PATCH] riscv: Use norvc over arch, -c Jesse Taube
2025-07-04  8:26 ` Andrew Jones [this message]

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