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[108.26.215.125]) by smtp.gmail.com with ESMTPSA id af79cd13be357-7d5dbdb5088sm937846285a.25.2025.07.09.06.47.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Jul 2025 06:47:09 -0700 (PDT) From: Jesse Taube To: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org Cc: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= , Charlie Jenkins , Jesse Taube , Andrew Jones , James Raphael Tiovalen , Sean Christopherson , Cade Richard Subject: [kvm-unit-tests PATCH v3 2/2] riscv: lib: Add sbi-exit-code to configure and environment Date: Wed, 9 Jul 2025 06:47:07 -0700 Message-ID: <20250709134707.1931882-2-jesse@rivosinc.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250709134707.1931882-1-jesse@rivosinc.com> References: <20250709134707.1931882-1-jesse@rivosinc.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add --[enable|disable]-sbi-exit-code to configure script. With the default value as disabled. Add a check for SBI_EXIT_CODE in the environment, so that passing of the test status is configurable from both the environment and the configure script Signed-off-by: Jesse Taube Reviewed-by: Andrew Jones --- V1 -> V2: - Factor out commonly used macros to new commit - Use ternary operator over if V2 -> V3: - No changes --- configure | 11 +++++++++++ lib/riscv/io.c | 4 +++- 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/configure b/configure index 20bf5042..7c949bdc 100755 --- a/configure +++ b/configure @@ -67,6 +67,7 @@ earlycon= console= efi= efi_direct= +sbi_exit_code=0 target_cpu= # Enable -Werror by default for git repositories only (i.e. developer builds) @@ -141,6 +142,9 @@ usage() { system and run from the UEFI shell. Ignored when efi isn't enabled and defaults to enabled when efi is enabled for riscv64. (arm64 and riscv64 only) + --[enable|disable]-sbi-exit-code + Enable or disable sending pass/fail exit code to SBI SRST. + (disabled by default, riscv only) EOF exit 1 } @@ -236,6 +240,12 @@ while [[ $optno -le $argc ]]; do --disable-efi-direct) efi_direct=n ;; + --enable-sbi-exit-code) + sbi_exit_code=1 + ;; + --disable-sbi-exit-code) + sbi_exit_code=0 + ;; --enable-werror) werror=-Werror ;; @@ -551,6 +561,7 @@ EOF elif [ "$arch" = "riscv32" ] || [ "$arch" = "riscv64" ]; then echo "#define CONFIG_UART_EARLY_BASE ${uart_early_addr}" >> lib/config.h [ "$console" = "sbi" ] && echo "#define CONFIG_SBI_CONSOLE" >> lib/config.h + echo "#define CONFIG_SBI_EXIT_CODE ${sbi_exit_code}" >> lib/config.h echo >> lib/config.h fi echo "#endif" >> lib/config.h diff --git a/lib/riscv/io.c b/lib/riscv/io.c index b1163404..c46845de 100644 --- a/lib/riscv/io.c +++ b/lib/riscv/io.c @@ -6,6 +6,7 @@ * Copyright (C) 2023, Ventana Micro Systems Inc., Andrew Jones */ #include +#include #include #include #include @@ -163,7 +164,8 @@ void halt(int code); void exit(int code) { printf("\nEXIT: STATUS=%d\n", ((code) << 1) | 1); - sbi_shutdown(code == 0); + + sbi_shutdown(GET_CONFIG_OR_ENV(SBI_EXIT_CODE) ? code == 0 : true); halt(code); __builtin_unreachable(); } -- 2.43.0